Datasheet
Data Sheet ADP5588
Rev. C | Page 19 of 28
Table 28. GPIO_DAT_OUTx—Register 0x17 to Register 0x19 (GPIO Data Out)
Register Name Register Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
GPIO_DAT_OUT1
(Register 0x17)
GPIO data out (GPIO data to be written to
GPIO out driver, inputs are not affected). This is
needed so that the value can be written prior
to being set as an output.
R7DO R6DO R5DO R4DO R3DO R2DO R1DO R0DO
GPIO_DAT_OUT2
(Register 0x18)
GPIO data out (GPIO data to be written to
GPIO out driver, inputs are not affected). This is
needed so that the value can be written prior
to being set as an output.
C7DO C6DO C5DO C4DO C3DO C2DO C1DO C0DO
GPIO_DAT_OUT3
(Register 0x19)
GPIO data out (GPIO data to be written to
GPIO out driver, inputs are not affected). This is
needed so that the value can be written prior
to being set as an output.
N/A N/A N/A N/A N/A N/A C9DO C8DO
Table 29. GPIO_INT_ENx—Register 0x1A to Register 0x1C (GPIO Interrupt Enable)
Register Name Register Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
GPIO_INT_EN1
(Register 0x1A)
GPIO interrupt enable (enables interrupts for
GP inputs only)
R7IE R6IE R5IE R4IE R3IE R2IE R1IE R0IE
GPIO_INT_EN2
(Register 0x1B)
GPIO interrupt enable (enables interrupts for
GP inputs only)
C7IE C6IE C5IE C4IE C3IE C2IE C1IE C0IE
GPIO_INT_EN3
(Register 0x1C)
GPIO interrupt enable (enables interrupts for
GP inputs only)
N/A N/A N/A N/A N/A N/A C9IE C8IE
Table 30. KP_GPIOx—Register 0x1D to Register 0x1F (Keypad or GPIO Selection)
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
KP_GPIO1
(Register 0x1D)
Keypad or GPIO selection
0: GPIO
1: KP matrix
R7 R6 R5 R4 R3 R2 R1 R0
KP_GPIO2
(Register 0x1E)
Keypad or GPIO selection
0: GPIO
1: KP matrix
C7 C6 C5 C4 C3 C2 C1 C0
KP_GPIO3
(Register 0x1F)
Keypad or GPIO selection
0: GPIO
1: KP matrix
N/A N/A N/A N/A N/A N/A C9 C8
Table 31. GPI_EM_REGx—Register 0x20 to Register 0x22 (GPI Event Mode 1 to GPI Event Mode 3)
Register Name Register Description Bit 7 Bit 6 Bit Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
GPI_EM_REG1
(Register 0x20)
GPI Event Mode Register 1
0: GPI not part of event FIFO
1: GPI part of event FIFO (R0 to R7)
R7_EM R6_EM R5_EM R4_EM R3_EM R2_EM R1_EM R0_EM
GPI_EM_REG2
(Register 0x21)
GPI Event Mode Register 2
0: GPI not part of event FIFO
1: GPI part of event FIFO (C0 to C7)
C7_EM C6_EM C5_EM C4_EM C3_EM C2_EM C1_EM C0_EM
GPI_EM_REG3
(Register 0x22)
GPI Event Mode Register 3
0: GPI not part of event FIFO
1: GPI part of event FIFO (C8 to C9)
NA NA NA NA NA NA C9_EM C8_EM