Datasheet

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ADP5520

Rev. A | Page 32 of 40

Bit Mnemonic R/W Description

2 KP_F_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key F press. Bit cleared on read.

1 KP_G_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key G press. Bit cleared on read.

0 KP_H_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key H press. Bit cleared on read.

Table 41. Register 0x21, Key Press Interrupt Status 2 (KP_INT_STAT_2)

Bit Mnemonic R/W Description

7 KP_I_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key I press. Bit cleared on read.

6 KP_J_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key J press. Bit cleared on read.

5 KP_K_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key K press. Bit cleared on read.

4 KP_L_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key L press. Bit cleared on read.

3 KP_M_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key M press. Bit cleared on read.

2 KP_N_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key N press. Bit cleared on read.

1 KP_O_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key O press. Bit cleared on read.

0 KP_P_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key P press. Bit cleared on read.

Table 42. Register 0x22, Key Release Interrupt Status 1 (KR_INT_STAT_1)

Bit Mnemonic R/W Description

7 KR_A_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key A release. Bit cleared on read.

6 KR_B_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key B release. Bit cleared on read.

5 KR_C_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key C release. Bit cleared on read.

4 KR_D_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key D release. Bit cleared on read.

3 KR_E_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key E release. Bit cleared on read.

2 KR_F_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key F release. Bit cleared on read.

1 KR_G_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key G release. Bit cleared on read.

0 KR_H_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key H release. Bit cleared on read.

Table 43. Register 0x23, Key Release Interrupt Status 2 (KR_INT_STAT_2)

Bit Mnemonic R/W Description

7 KR_I_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key I release. Bit cleared on read.

6 KR_J_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key J release. Bit cleared on read.

5 KR_K_ISTAT R 0 = no interrupt detected.

1 = interrupt due to Key K release. Bit cleared on read.