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Backlight Driver with I/O Expander

ADP5520

Rev. A

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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

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FEATURES

Efficient asynchronous boost converter for driving up to

6 white LEDs

2.7 V to 5.5 V input voltage range

128 programmable backlight LED current levels (30 mA

maximum)

Ambient light sensing with autonomous backlight

adjustment

Programmable backlight fade-in/fade-out times

Programmable backlight dim and off times

8 configurable GPIO pins (input, output, up to 4 × 4 keypad)

Up to 3 auxiliary LED current sinks (1 dedicated, 2 configurable)

64 programmable auxiliary LED current levels (14 mA

maximum)

Programmable auxiliary LED fade-in/fade-out times

Programmable auxiliary LED on and off times (allows

blinking)

C-compatible serial interface

Interrupt line for signaling an external processor (nINT)

Hard reset (nRST)

Current limit protection

Thermal overload protection

Available in small 4.0 mm × 4.0 mm, 24-lead LFCSP package

APPLICATIONS

Display backlight driver for phones that require slider or flip

keypad functions with single or multiple LED indicators

TYPICAL OPERATING CIRCUIT

PGND

VBAT

VDDIO

SCL

SDA

nINT

nRST

ADP5520

1µF

4.7µH

1µF

VBAT

I/O RAIL

10kΩ

2.2kΩ

ILED

I/O

ABCD

EFGH

VBAT

BST

BL_SNK

CAP_OUT

VBAT

100nF

1µF

GND

CMP_IN

7445-001

Figure 1.

GENERAL DESCRIPTION

The ADP5520 is a versatile single-chip, white LED backlight

driver with a user configurable I/O expander. This device fits

handset applications where the flip or slider section of the phone

requires backlighting, I/O signaling and detecting, auxiliary LED

lighting, and keypad functions. By incorporating an I

C®-

compatible serial interface and a single line interrupt, the

ADP5520 significantly reduces the total number of lines

required to interface with the baseband processor across the

hinge flex.

The ADP5520 can detect ambient light levels and adjust the

backlight brightness accordingly, resulting in extended battery

operation.

Once configured, the ADP5520 is capable of controlling the

flip/slider backlight intensity, on/off timing, dimming, and

fading without the intervention of the main processor, which

results in valuable battery power saving.

Summary of content (40 pages)

PAGE 1
Backlight Driver with I/O Expander ADP5520 FEATURES TYPICAL OPERATING CIRCUIT 1µF VBAT 4.7µH 2 PGND SW 21 VBAT 16 VDDIO 5 SCL 4 SDA 3 nINT 15 nRST 2.2kΩ 10kΩ 2.2kΩ I/O RAIL 1 22 23 BST BL_SNK CAP_OUT 20 1µF GND 19 GND 18 ADP5520 GND 24 100nF CMP_IN 17 R3 R2 R1 R0 C0 C1 C2 C3 6 I/O I/O 13 7 8 9 10 11 12 A B C D E F G H ILED VBAT 14 VBAT 07445-001 1µF 10kΩ Efficient asynchronous boost converter for driving up to 6 white LEDs 2.7 V to 5.
PAGE 2
ADP5520 TABLE OF CONTENTS Features .............................................................................................. 1 Advanced Fading (Square) ........................................................ 13 Applications ....................................................................................... 1 Advanced Fading (Cubic 1 and Cubic 2) ................................ 14 Typical Operating Circuit ................................................................
PAGE 3
ADP5520 SPECIFICATIONS VBAT = 2.7 V to 4.8 V, TJ = −40°C to +125°C, unless otherwise noted. 1 Table 1.
PAGE 4
ADP5520 I2C TIMING SPECIFICATIONS Table 2.
PAGE 5
ADP5520 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter VBAT to GND VDDIO to GND SW, BST to GND ILED, R0, R1, R2, R3, C0, C1, C2, C3, CMP_IN, SCL, SDA, nINT, nRST, CAP_OUT, BL_SNK to GND PGND to GND Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Soldering Conditions 1 Rating −0.3 V to +6 V −0.3 V to VBAT −0.3 V to +30 V −0.3 V to +6 V −0.3 V to +0.
PAGE 6
ADP5520 24 23 22 21 20 19 GND BL_SNK BST VBAT CAP_OUT GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 PIN 1 INDICATOR ADP5520 TOP VIEW (Not to Scale) 18 17 16 15 14 13 GND CMP_IN VDDIO nRST ILED R3 NOTES 1. EXPOSED PAD MUST BE CONNECTED TO GROUND. 07445-003 R1 R0 C0 C1 C2 C3 7 8 9 10 11 12 PGND SW nINT SDA SCL R2 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No.
PAGE 7
ADP5520 TYPICAL PERFORMANCE CHARACTERISTICS VBAT = 3.6 V, TA = 25°C, unless otherwise noted. Inductor = LPS4012-472MLB. Schottky rectifier = MBR140SFT1G. 48 90 STANDBY SUPPLY CURRENT (µA) 85 80 EFFICIENCY (%) 75 70 65 60 6 LEDs, 6 LEDs, 6 LEDs, 6 LEDs, 55 50 VBAT VBAT VBAT VBAT = 3.0V = 3.6V = 4.2V = 5.5V TEMP = –40°C 40 TEMP = +25°C 32 24 16 TEMP = +85°C 8 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 BACKLIGHT CURRENT (mA) 30 0 2.5 07445-047 40 Figure 4. Efficiency vs.
PAGE 8
ADP5520 SW SW 1 1 INDUCTOR CURRENT INDUCTOR CURRENT 2 2 BST BST 3 4 CH1 20.0V CH3 10.0V CH2 500mA CH4 1.0V TIME (4µs/DIV) BL_SNK 4 CH1 20.0V CH3 10.0V Figure 9. Boost Operation (Backlight = 30 mA) CH2 500mA CH4 1.0V TIME (4µs/DIV) 07445-054 BL_SNK 07445-052 3 Figure 11. Boost Operation (Backlight = 2 mA) SW SW 1 1 INDUCTOR CURRENT INDUCTOR CURRENT 2 2 BST BST BL_SNK 3 3 CH2 500mA CH4 1.0V TIME (4µs/DIV) 4 07445-053 CH1 20.0V CH3 10.0V CH1 10.0V CH3 10.0V Figure 10.
PAGE 9
ADP5520 THEORY OF OPERATION 1µF VBAT 4.7µH 1µF SW BST 2 BL_SNK 22 23 27V I-LIMIT FB AUTO LOAD 0.65V OVP BACKLIGHT CURRENT CONTROL BOOST CONTROL PGND 1 VBAT THERMAL S/D IN 21 VDDIO 16 POR EN LDO VBAT OUT CAP_OUT STATE MACHINE LIGHT SENSOR 20 1µF 17 CMP_IN 2.
PAGE 10
ADP5520 BACKLIGHT MAXIMUM AND DIM SETTINGS BST BL_SNK The backlight maximum and dim current settings are determined by a 7-bit code programmed by the user into the registers listed in the Backlight Operating Levels section. This 7-bit resolution allows the user to set the backlight to 1 of 128 different levels between 0 mA and 30 mA. The ADP5520 can implement two distinct algorithms to achieve a linear and a nonlinear relationship between input code and backlight current.
PAGE 11
ADP5520 BACKLIGHT TURN ON/OFF/DIM AUTOMATIC DIM AND TURN OFF TIMERS With the device in operating mode (nSTNBY = 1), the backlight can be turned on using the BL_EN bit in Register 0x00. Before turning on the backlight, the user should choose which level (daylight (L1), office (L2), or dark (L3)) to operate in, and ensure that maximum and dim settings are programmed for that level. The backlight turns on when BL_EN = 1. The backlight turns off when BL_EN = 0.
PAGE 12
ADP5520 Reasserting BL_EN at any point during the off timer countdown causes the timer to reset and begin counting again. The backlight can be turned off at any point during the off timer countdown by clearing BL_EN. The dim timer and off timer can be used together for sequential maximum-to-dim-to-off functionality. With both the dim and off timers programmed, if BL_EN is asserted, the backlight turns on to its maximum setting. When the dim timer expires, the backlight changes to its dim setting.
PAGE 13
ADP5520 Figure 25 shows the fade timers used with the dim and off timers. Although the default linear fade algorithm gives a smooth increase and decrease in backlight current, the resulting increase and decrease in brightness still appears visually abrupt. For example, for a given fade-in time, the eye can notice an initial increase in brightness as backlight current is increased, but cannot perceive much more of an increase in brightness as backlight current is increased to maximum.
PAGE 14
ADP5520 ADVANCED FADING (CUBIC 1 AND CUBIC 2) AMBIENT LIGHT SENSING Two additional advanced techniques are available for fading the backlight brightness levels, Cubic 1 (BL_LAW = 10) and Cubic 2 (BL_LAW = 11). Referring to the backlight brightness control block diagram shown in Figure 14, linear and square fading is implemented by ramping the 128 linear/square algorithm codes at a fixed frequency over the duration of a given fade-in/fadeout time.
PAGE 15
ADP5520 VDDIO takes 80 ms (typical). Filter times of between 80 ms and 10 sec can be programmed for the comparators before they change state. It is also possible to use the light sensor comparators in a single shot mode. After the single shot measurement is completed, the internal state machine clears the FORCE_RD bit. The ambient light sensor comparators can be used to automatically transition the backlight between one of its three operating levels.
PAGE 16
ADP5520 To configure the device for key scanning and decoding, the R0, R1, R2, and R3 pull-ups must be enabled in Register 0x1F. Key scanning and decoding is then enabled by programming the row and column bits in Register 0x17. The row pull-ups must be enabled before enabling key scanning. Figure 35 shows the row and column pins connected to a typical 4 × 4, 16-switch keypad matrix. When key scanning is idle, the row pins are pulled high and the column pins are pulled low.
PAGE 17
ADP5520 To deassert the nINT pin and clear the KR_INT flag, Register 0x22 and Register 0x23 must be cleared by reading them once, and then a 1 must be written to the KR_INT bit in Register 0x00. Figure 39 shows the interrupt generation scheme, where KR_x_ISTAT represents any one of the 16-key release interrupt status bits. REGISTERS KP_x_ISTAT 0x22 AND 0x23 REG 0x00 WRITE 1 TO CLEAR KR_INT AND REG 0x01 KP_IEN nINT DRIVE 07445-028 READ ONCE TO CLEAR Figure 39.
PAGE 18
ADP5520 14 The ADP5520 can also implement a nonlinear (square approximation) relationship between input code and LED sink current level. In this case (LED_LAW = 1), the LED sink current (in milliamps) is determined by the following equation: ⎞ ⎟ ⎟ ⎠ 12 LED SINK CURRENT (mA) ⎛ Fullscale _ Current LED Sink Current = ⎜ Code × ⎜ 63 ⎝ 0.3 SEC 0.6 SEC 0.9 SEC 1.2 SEC 1.5 SEC 1.8 SEC 2.1 SEC 2.4 SEC 2.7 SEC 3.0 SEC 3.5 SEC 4.0 SEC 4.5 SEC 5.0 SEC 5.
PAGE 19
ADP5520 All fade, on, and off timers should be programmed before enabling any of the LED current sinks. If LEDx is on during a blink cycle and LEDx_EN is cleared, it turns off (or fades to off if fade-out is enabled). If LEDx is off during a blink cycle and LEDx_EN is cleared, then it stays off. LEDx CURRENT ON TIME FADE-IN FADE-OUT MAX LEDx_EN = 1 SET BY USER VDDIO ALS COMPARATOR INTERRUPTS GPIO INTERRUPTS KEY PRESS INTERRUPTS OR nINT KEY RELEASE INTERRUPTS OVERVOLTAGE INTERRUPT Figure 47.
PAGE 20
ADP5520 COMMUNICATION INTERFACE Communication to the ADP5520 is done via its I2C-compatible serial interface. Figure 48 shows a typical write sequence for programming an internal register. 5. 6. 7. 8. 0 = WRITE ST SP 1 1 0 0 1 CHIP ADDRESS 0 0 0 0 0 REGISTER ADDRESS ADP5520 RECEIVES DATA 07445-037 0 ADP5520 ACK Figure 48. I2C Write Sequence 0 = WRITE 1 = READ ST 0 1 1 0 0 1 CHIP ADDRESS 0 0 0 0 REGISTER ADDRESS SP 0 1 1 0 0 1 CHIP ADDRESS Figure 49.
PAGE 21
ADP5520 REGISTER MAP All registers are 0 on reset. Unused bits are read as 0. Table 7.
PAGE 22
ADP5520 DETAILED REGISTER DESCRIPTIONS If one of the interrupt bits in Table 8 is cleared and there is a pending interrupt, nINT deasserts for 50 μs and reasserts, but the status of the pending interrupt stays set. Table 8. Register 0x00, Device Mode and Status (MODE_STATUS) Bit 7 Mnemonic nSTNBY R/W R/W 6 BL_EN R/W 5 DIM_EN 4 OVP_INT 3 CMPR_INT 2 GPI_INT 1 KR_INT 0 KP_INT R/W Description 0 = device is in standby mode. If 1.8 V ≤ VDDIO ≤ 3.
PAGE 23
ADP5520 Table 10. Register 0x02, Backlight Control (BL_CONTROL) Bit 7 to 6 Mnemonic BL_LVL R/W R/W 5 to 4 BL_LAW R/W 3 BL_AUTO_ADJ R/W 2 OVP_EN R/W 1 FOVR R/W 0 KP_BL_EN R/W Description Brightness level control for the backlight. 00 = daylight (L1). 01 = office (L2). 10 = dark (L3). See the description for the BL_AUTO_ADJ bit. Backlight fade-on/fade-off transfer characteristic. 00 = linear. 01 = square. 10 = Cubic 1. 11 = Cubic 2.
PAGE 24
ADP5520 Bit Mnemonic R/W Description 1010 = 70 sec. 1011 = 80 sec. 1100 = 90 sec. 1101 = 100 sec. 1110 = 110 sec. 1111 = 120 sec. Table 12. Register 0x04, Backlight Fade-In and Fade-Out Timers (BL_FADE) Bit 7 to 4 Mnemonic BL_FO R/W R/W 3 to 0 BL_FI R/W Description Backlight fade-out timer (timer should be set before BL_EN is set). 0000 = timer disabled. 0001 = 0.3 sec. 0010 = 0.6 sec. 0011 = 0.9 sec. 0100 = 1.2 sec. 0101 = 1.5 sec. 0110 = 1.8 sec. 0111 = 2.1 sec. 1000 = 2.4 sec. 1001 = 2.7 sec.
PAGE 25
ADP5520 Table 14. Register 0x06, Level 1 (Daylight) Dim Current (DAYLIGHT_DIM) Bit 7 6 to 0 Mnemonic R/W DAYLIGHT_DIM R/W Description Unused. Dim current setting for the backlight when BL_LVL is at Level 1 (daylight). See Figure 16 for backlight current vs. sink code relationship. Table 15. Register 0x07, Level 2 (Office) Maximum Current (OFFICE_MAX) Bit 7 6 to 0 Mnemonic R/W OFFICE_MAX R/W Description Unused. Maximum current setting for the backlight when BL_LVL is at Level 2 (office).
PAGE 26
ADP5520 Bit 0 Mnemonic L2_EN R/W R/W Description 0 = disable Comparator L2_CMPR. 1 = enable Comparator L2_CMPR. If automatic backlight adjustment is required, BL_AUTO_ADJ must be set also. Table 21. Register 0x0D, Level 2 (Office) Comparator Trip Point (L2_TRIP) Bit 7 to 0 Mnemonic L2_TRIP R/W R/W Description Sets the trip value for Comparator L2_CMPR. If ambient light levels fall below this trip point, L2_OUT is set. Each code is equal to 4 μA (typical). Full scale is 1000 μA (typical). Table 22.
PAGE 27
ADP5520 Bit 3 to 2 Mnemonic LED2_OFFT R/W R/W 1 to 0 LED1_OFFT R/W Description Sets the LED 2 off time when used in conjunction with the LED_ONT timer to perform LED blinking. LED 2 stays on continuously if the timer is disabled. 00 = LED 2 timer disabled. 01 = 0.6 sec. 10 = 0.8 sec. 11 = 1.2 sec. Sets the LED 1 off time when used in conjunction with the LED _ONT timer to perform LED blinking. LED 1 stays on continuously if the timer is disabled. 00 = LED 1 timer disabled. 01 = 0.6 sec. 10 = 0.8 sec.
PAGE 28
ADP5520 Table 28. Register 0x14, LED 1 Sink Current (LED1_CURRENT) Bit 7 to 6 5 to 0 Mnemonic R/W LED1_CURRENT R/W Description Unused. Sink current setting for LED 1. See Figure 41 for LED sink current vs. code relationship. Table 29. Register 0x15, LED 2 Sink Current (LED2_CURRENT) Bit 7 to 6 5 to 0 Mnemonic R/W LED2_CURRENT R/W Description Unused. Sink current setting for LED 2. See Figure 41 for LED sink current vs. code relationship. Table 30.
PAGE 29
ADP5520 Table 33. Register 0x19, GPIO Input Status (GPIO_IN) Bit 7 Mnemonic D7_IN R/W R 6 D6_IN R 5 D5_IN R 4 D4_IN R 3 D3_IN R 2 D2_IN R 1 D1_IN R 0 D0_IN R Description 0 = D7 input is low. 1 = D7 input is high. 0 = D6 input is low. 1 = D6 input is high. 0 = D5 input is low. 1 = D5 input is high. 0 = D4 input is low. 1 = D4 input is high. 0 = D3 input is low. 1 = D3 input is high. 0 = D2 input is low. 1 = D2 input is high. 0 = D1 input is low. 1 = D1 input is high.
PAGE 30
ADP5520 Bit 1 Mnemonic D1_IN_IEN R/W R/W 0 D0_IN_IEN R/W Description 0 = prevents D1 input from generating interrupts on nINT. 1 = allows D1 input to generate interrupts on nINT. 0 = prevents D0 input from generating interrupts on nINT. 1 = allows D0 input to generate interrupts on nINT. Table 36.
PAGE 31
ADP5520 Table 38. Register 0x1E, GPIO Input Debounce Enable/Disable (GPIO_DEBOUNCE) Bit 7 Mnemonic D7_ IN_ DBNC R/W R/W 6 D6_ IN_ DBNC R/W 5 D5_ IN_ DBNC R/W 4 D4_ IN_ DBNC R/W 3 D3_ IN_ DBNC R/W 2 D2_ IN_ DBNC R/W 1 D1_ IN_ DBNC R/W 0 D0_ IN_ DBNC R/W Description 0 = D7_IN debounce enabled. 1 = D7_IN debounce disabled. 0 = D6_IN debounce enabled. 1 = D6_IN debounce disabled. 0 = D5_IN debounce enabled. 1 = D5_IN debounce disabled. 0 = D4_IN debounce enabled.
PAGE 32
ADP5520 Bit 2 Mnemonic KP_F_ISTAT R/W R 1 KP_G_ISTAT R 0 KP_H_ISTAT R Description 0 = no interrupt detected. 1 = interrupt due to Key F press. Bit cleared on read. 0 = no interrupt detected. 1 = interrupt due to Key G press. Bit cleared on read. 0 = no interrupt detected. 1 = interrupt due to Key H press. Bit cleared on read. Table 41.
PAGE 33
ADP5520 Bit 4 Mnemonic KR_L_ISTAT R/W R 3 KR_M_ISTAT R 2 KR_N_ISTAT R 1 KR_O_ISTAT R 0 KR_P_ISTAT R Description 0 = no interrupt detected. 1 = interrupt due to Key L release. Bit cleared on read. 0 = no interrupt detected. 1 = interrupt due to Key M release. Bit cleared on read. 0 = no interrupt detected. 1 = interrupt due to Key N release. Bit cleared on read. 0 = no interrupt detected. 1 = interrupt due to Key O release. Bit cleared on read. 0 = no interrupt detected.
PAGE 34
ADP5520 APPLICATIONS INFORMATION CONVERTER TOPOLOGY The ADP5520 backlight driver utilizes a dc-to-dc step-up (boost) converter to achieve the high voltage levels required to drive up to six white LEDs in series. Figure 50 shows the basic asynchronous boost converter topology. 4.7µH SW 1µF BST 2 BL_SNK 22 27V I-LIMIT 23 AUTO LOAD FB 0.65V OVP VOUT PGND 07445-058 VBAT BACKLIGHT CURRENT CONTROL BOOST CONTROL 1 THERMAL S/D 21 07445-059 VIN 1µF VBAT Figure 51.
PAGE 35
ADP5520 Component Selection input capacitor with sufficient ripple current rating to handle the inductor ripple. A 1 μF X5R/X7R ceramic capacitor rated for 16 V dc bias is recommended for the input capacitance. The ADP5520 boost converter is designed for use with a 4.7 μH inductor. Choose an inductor with a sufficient current rating to prevent it from going into saturation. The peak current limit of the ADP5520 is 750 mA (maximum), so choose an inductor with a greater saturation rating.
PAGE 36
ADP5520 EXAMPLE CIRCUITS 1µF VBAT 1µF VBAT 21 VBAT 16 VDDIO 23 BL_SNK 1µF 1µF ADP5520 GND 24 nINT 15 nRST CAP_OUT 20 1µF 16 VDDIO GND 19 GND 24 4 SDA CMP_IN 17 100nF 3 nINT R3 R2 R1 R0 C0 C1 C2 C3 6 7 8 9 10 11 ILED 12 VBAT CMP_IN 17 15 nRST 14 R2 R1 R0 C0 C1 C2 6 B C E F G H I J K L M N O P 7 10 11 A B C E F G I J K R3 C3 13 12 ILED VBAT 14 D VBAT VBAT Figure 55. I/O Configuration Example 3 1µF VBAT 4.
PAGE 37
ADP5520 4.7µH SW BST BL_SNK CAP_OUT 20 GND 24 100nF CMP_IN 17 15 nRST 8 9 10 11 12 I/O I/O I/O I/O I/O I/O I/O SCL 4 SDA 3 nINT 15 nRST VBAT VBAT GND 24 100nF CMP_IN 17 R2 R1 R0 C0 C1 C2 14 GND 18 ADP5520 6 7 8 9 10 11 I/O 7 5 1µF GND 19 I/O 6 ILED VDDIO 07445-043 13 I/O R3 R2 R1 R0 C0 C1 C2 C3 16 CAP_OUT 20 I/O 3 nINT VBAT 23 BL_SNK I/O 4 SDA 21 22 BST I/O GND 18 ADP5520 5 SCL PGND SW I/O GND 19 1 2.2kΩ I/O RAIL 1µF 16 VDDIO 4.
PAGE 38
ADP5520 OUTLINE DIMENSIONS 0.60 MAX 4.00 BSC SQ TOP VIEW 0.50 BSC 3.75 BSC SQ 0.50 0.40 0.30 1.00 0.85 0.80 12° MAX 0.80 MAX 0.65 TYP SEATING PLANE 19 18 *2.45 EXPOSED PAD 2.30 SQ 2.15 (BOTTOMVIEW) 13 12 7 6 0.23 MIN 2.50 REF 0.05 MAX 0.02 NOM 0.30 0.23 0.18 PIN 1 INDICATOR 24 1 0.20 REF COPLANARITY 0.08 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
PAGE 39
ADP5520 NOTES Rev.