Datasheet

Data Sheet ADP5062
Rev. B | Page 9 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Name Type
1
Description
9, 10, 11 ISO_S1, ISO_S2,
ISO_S3
I/O Linear Charger Supply Side Input to Internal Isolation FET/Battery Current Regulation FET. High
current input/output.
6, 7, 8 VIN1, VIN2, VIN3 I/O Power Connections to USB VBUS. These pins are high current inputs when in charging mode.
20 AGND G Analog Ground.
12, 13, 14 ISO_B1, ISO_B2,
ISO_B3
I/O Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
1 SCL I I
2
C-Compatible Interface Serial Clock.
17 SDA I/O I
2
C-Compatible Interface Serial Data.
5 DIG_IO1 GPIO Set Input Current Limit. This pin sets the input current limit directly. When DIG_IO1 = low or
high-Z, the input limit is 100 mA. When DIG_IO1 = high, the input limit is 500 mA.
2, 3
3 DIG_IO2 GPIO Disable IC1. The DIG_IO2 pin sets the charger to the low current mode. When DIG_IO2 = low or
high-Z, the charger operates in normal mode. When DIG_IO2 = high, the LDO and the charger are
disabled and VINx current consumption is 280 µA (typical). In addition, when DIG_IO2 is high,
20 V VINx input protection is disabled and the VINx voltage level must fulfill the condition,
V
ISO_Bx
< V
VINx
< 5.5 V.
2, 3
2 DIG_IO3 GPIO Enable Charging. When DIG_IO3 = low or high-Z, charging is disabled. When DIG_IO3 = high,
charging is enabled.
2, 3
18 THR I Battery Pack Thermistor Connection. If this pin is not used, connect a dummy 10 kΩ resistor from
THR to GND.
4 BAT_SNS I Battery Voltage Sense Pin.
15 ILED O Open-Drain Output to Indicator LED.
16 SYS_EN O System Enable. This pin is the battery OK flag/open-drain pull-down FET to enable the system
when the battery reaches the V
WEAK
level.
19 CBP I/O Bypass Capacitor Input.
N/A
4
EP N/A
4
Exposed Pad. Connection of the exposed pad is not required. The exposed pad can be connected
to analog ground to improve heat dissipation from the package to the board.
1
I is input, O is output, I/O is input/output, G is ground, and GPIO is the factory programmable general-purpose input/output.
2
See the Digital Input and Output Options section for details.
3
The DIG_IOx setting defines the initial state of the ADP5062. If the parameter or the mode that is related to each DIG_IOx pin setting is changed (by programming an
equivalent I
2
C register bit or bits), the I
2
C register setting takes precedence over the DIG_IOx pin setting. VINx connection or disconnection resets control to the
DIG_IOx pin.
4
N/A means not applicable.
10806-003
PIN 1
INDICATOR
1
SCL
2DIG_IO3
3DIG_IO2
4BAT_SNS
5
DIG_IO1
13 ISO_B2
14
ISO_B3
15 ILED
12 ISO_B1
11 ISO_S3
6VIN1
7VIN2
8VIN3
10ISO_S2
9ISO_S1
18
THR
19
CBP
20
AGND
17
SDA
16
SYS_EN
TOP VIEW
(Not to Scale)
ADP5062
NOTES
1. CONNECTION OF THE EXPOSED PAD IS NOT REQUIRED. THE
EXPOSED PAD CAN BE CONNECTED TO ANALOG GROUND TO
IMPROVE HEAT DISSIPATION FROM THE PACKAGE TO BOARD.