Datasheet

ADP5062 Data Sheet
Rev. B | Page 38 of 44
PCB LAYOUT GUIDELINES
Figure 40. Reference Circuit Diagram
Figure 41. Reference PCB Floor Plan
9
VDDIO
10
11
13
14
19
7
6
1
17
20
5
3
18
VIN1 TO VIN3
CBP
SCL
SDA
ISO_S1 TO ISO_S3
ISO_B1 TO ISO_B3
SYS_EN
AGND
DIG_IO1
DIG_IO2
DIG_IO3
THR
4
BAT_SNS
TO MCU
TO MCU
TO MCU
TO MCU/NC
TO MCU/NC
CHARGER
CONTROL
BLOCK
R5 NTC 10kΩ
(OPTIONAL)
CONNECT
CLOSE TO
BATTERY +
8
12
2
TO MCU/NC
15
ILED
VLED
16
VDDIO
R4
10kΩ
R2
1.5kΩ
R1
1.5kΩ
C4
10µF
GRM21BR6E106MA73
C1
10nF
GRM15XR71C103KA8
VIN = 4V TO 7V
C3
22µF
GRM31CR60J226ME19
C2
22µF
GRM31CR60J22ME19
ADP5062
20-LEAD LFCSP
10806-040
VINx
PGND
PGND
CBP
PGND
ISO_Bx
ISO_Sx
C4 – 10µF
25V/X5R
0805
C3 – 22µF
16V/X5R
1206
C2 – 22µF
16V/X5R
1206
C1 – 10nF
16V/X7R
0402
10806-100