Tiny I2C Programmable Linear Battery Charger with Power Path and USB Mode Compatibility ADP5061 Data Sheet FEATURES TYPICAL APPLICATION CIRCUIT ADP5061 VBUS C1 10µF ISO_S VIN CBP C2 10nF C3 47µF SCL SDA DIG_IO1 DIG_IO2 DIG_IO3 SYSTEM ISO_B CHARGER CONTROL BLOCK BAT_SNS + Li-ion C4 22µF THR SYS_EN ILED VLED AGND 10544-001 AC OR USB PROGRAMMABLE 2.6 mm × 2 mm WLCSP package Fully programmable via I2C Flexible digital control inputs Up to 2.
ADP5061 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Battery Isolation FET ................................................................. 20 Applications ....................................................................................... 1 Battery Detection ....................................................................... 20 Typical Application Circuit ................................................
Data Sheet ADP5061 SPECIFICATIONS −40°C < TJ < +125°C, VVIN = 5.0 V, VHOT < VTHR < VCOLD, VBAT_SNS = 3.6 V, VISO_B = VBAT_SNS, CVIN = 10 µF, CISO_S = 22 µF, CISO_B = 22 µF, CCBP = 10 nF, all registers at default values, unless otherwise noted. Table 1. Parameter GENERAL PARAMETERS Undervoltage Lockout Hysteresis Total Input Current VINx Current Consumption Battery Current Consumption CHARGER Fast Charge Current CC Mode Symbol Min Typ Max Unit Test Conditions/Comments VUVLO 2.25 50 74 114 2.
ADP5061 Parameter LDO AND HIGH VOLTAGE BLOCKING Regulated System Voltage Load Regulation High Voltage Blocking FET (LDO FET) On Resistance Maximum Output Current VINx Input Voltage, Good Threshold Rising VINx Falling VINx Input Overvoltage Threshold Hysteresis VINx Transition Timing THERMAL CONTROL Isothermal Charging Temperature Thermal Early Warning Temperature Thermal Shutdown Temperature THERMISTOR CONTROL Thermistor Current 10,000 NTC 100,000 NTC Thermistor Capacitance Cold Temperature Threshold Resist
Data Sheet Parameter JEITA2 Li-ION BATTERY CHARGING SPECIFICATION DEFAULTS5 JEITA Cold Temperature Resistance Thresholds Cool to Cold Resistance Cold to Cool Resistance JEITA Cool Temperature Resistance Thresholds Typical to Cool Resistance Cool to Typical Resistance JEITA Typical Temperature Resistance Thresholds Warm to Typical Resistance Typical to Warm Resistance JEITA Warm Temperature Resistance Thresholds Hot to Warm Resistance Warm to Hot Resistance JEITA Hot Temperature BATTERY DETECTION Battery Det
ADP5061 Data Sheet RECOMMENDED INPUT AND OUTPUT CAPACITANCES Table 2. Parameter CAPACITANCES VINx CBP ISO_Sx ISO_Bx Symbol Min Typ CVIN CBP CISO_S CISO_B 4 6 20 10 10 47 22 Max Unit Test Conditions/Comments 10 14 100 μF nF μF μF Effective capacitance Effective capacitance Effective capacitance Effective capacitance I2C-COMPATIBLE INTERFACE TIMING SPECIFICATIONS Table 3.
Data Sheet ADP5061 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. Absolute Maximum Ratings θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in a circuit board for surfacemount packages. Parameter VIN1, VIN2, VIN3 to AGND All Other Pins to AGND Continuous Drain Current, Battery Supplementary Mode, from ISO_Bx to ISO_Sx Storage Temperature Range Operating Junction Temperature Range Soldering Conditions Rating –0.5 V to +20 V –0.3 V to +6 V 2.
ADP5061 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 CORNER 1 2 3 4 ILED SYS_EN SDA SCL AGND THR CBP DIG_IO3 ISO_B3 ISO_S3 VIN3 DIG_IO2 ISO_B2 ISO_S2 VIN2 BAT_SNS ISO_B1 ISO_S1 VIN1 DIG_IO1 A B C D TOP VIEW (BALL SIDE DOWN) Not to Scale 10544-003 E Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No.
Data Sheet ADP5061 TYPICAL PERFORMANCE CHARACTERISTICS 5.05 4.34 5.04 4.33 5.03 4.32 4.31 4.30 4.29 4.28 5.01 5.00 4.99 4.98 4.27 4.97 4.26 4.96 4.25 0.01 0.1 1 SYSTEM OUTPUT CURRENT (A) 4.95 0.01 4.4 Figure 7. System Voltage vs. System Output Current, LDO Mode, VVIN = 6.0 V, VSYSTEM[2:0] = 111 (Binary) = 5.0 V 5.4 LOAD = 100mA LOAD = 500mA LOAD = 1000mA 5.2 4.3 SYSTEM VOLTAGE (V) 4.1 4.0 3.9 3.8 4.8 4.6 4.4 4.2 4.0 3.7 3.8 3.6 3.6 4.8 5.2 5.6 6.0 6.4 3.4 4.0 10544-005 4.
Data Sheet 40 40 38 38 ISOLATION FET RESISTANCE (mΩ) 36 34 32 30 28 26 24 36 34 32 30 28 26 24 3.7 4.2 BATTERY VOLTAGE (V) 20 4.4 BATTERY VOLTAGE (A) 2.5 2.0 1.5 1.0 0.5 0 0 2 4 6 INPUT VOLTAGE (V) Figure 11. VINx Current vs. VINx Voltage 8 10544-011 VINx CURRENT (mA) 3.0 1.0 1.5 2.0 Figure 12. Ideal Diode RON vs. Load Current, VISO_B = 3.6 V DEFAULT STARTUP DIS_LDO = HIGH DIS_IC1 = HIGH 3.5 0.5 LOAD CURRENT (A) Figure 10. Ideal Diode RON vs.
Data Sheet ADP5061 TEMPERATURE CHARACTERISTICS 1.5 0.5 VISO_B = 3.6V VISO_B = 4.2V VISO_B = 5.5V 1.3 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.2 0.1 0 –0.1 –0.2 –0.3 –15 10 35 60 85 AMBIENT TEMPERATURE (°C) –0.5 –40 10544-014 0 –40 5 20 35 50 65 80 95 110 125 Figure 17. System Voltage vs. Temperature, Trickle Charge Mode, VISO_S = 4.3 V and VINx = 5.0 V, or VISO_S = 5.0 V and VINx = 6.0 V 5.0 VIN = 4.0V VIN = 5.0V VIN = 5.5V VIN = 4.0V VIN = 5.0V VIN = 6.7V 4.
Data Sheet 1.4 1.3 ICHG = 1300mA INPUT CURRENT LIMIT (A) CHARGE CURRENT (A) 1.2 1.1 1.0 0.9 0.8 0.7 ICHG = 750mA 0.6 ICHG = 500mA 0.4 –40 –15 10 35 60 85 110 AMBIENT TEMPERATURE (°C) 10544-020 0.5 6.95 6.90 6.85 –10 5 20 35 50 65 80 95 110 125 AMBIENT TEMPERATURE (°C) 10544-021 VIN OVERVOLTAGE THRESHOLD (V) 7.00 –25 20 35 50 65 80 95 110 AMBIENT TEMPERATURE (°C) Figure 22. Input Current Limit vs. Ambient Temperature Figure 20. Fast Charge CC Mode Current vs.
Data Sheet ADP5061 TYPICAL WAVEFORMS VISO_S VISO_S VVIN VVIN 4 IISO_B 4 1 3 2 IVIN 10544-023 2 IISO_B CH1 2.00V CH3 200mA CH2 200mA CH4 2.00V M1.00ms CH2 T 1.00000ms 10.0MS/s 100k points IVIN 10544-026 1 3 CH1 2.00V CH2 200mA 120mA CH3 200mA CH4 2.00V Figure 23. Charging Startup, VVIN = 5.0 V, ILIM[3:0] = 0110 (Binary) = 500 mA, ICHG[4:0] = 01110 (Binary) = 750 mA M200.0µs CH2 T 0.00000s 50.0MS/s 100k points 216mA Figure 26.
ADP5061 Data Sheet THEORY OF OPERATION SUMMARY OF OPERATION MODES Table 7. Summary of the ADP5061 Operation Modes Battery Condition Any battery condition Trickle Charge Off LDO FET State Off Battery Isolation FET On/Off 5V 5V Any battery condition Any battery condition Off Off Off Off On On System Voltage ISO_Sx Battery voltage or 0 V Battery voltage Battery voltage 5V Any battery condition Off Off Off 0V 5V Any battery condition Off LDO Off 5.
Data Sheet ADP5061 INTRODUCTION The ADP5061 is a fully programmable I2C charger for single cell lithium-ion or lithium-polymer batteries suitable for a wide range of portable applications. The linear charger architecture enables up to 2.1 A output current at 4.3 V to 5.0 V (I2C programmable) on the system power supply, and up to 1.3 A charge current into the battery from a dedicated charger. The ADP5061 operates from an input voltage of 4 V up to 6.7 V but is tolerant of voltages of up to 20 V.
ADP5061 E3 TO USB VBUS OR WALL ADAPTER D3 C3 Data Sheet VIN1 ISO_S2 VIN2 VIN3 ISO_S3 + 6.85V B3 ISO_S1 HIGH VOLTAGE BLOCKING LDO-FET LDO-FET CONTROL – + VIN LIMIT CBP – TRICKLE CURRENT SOURCE – 3MHz OSC ISO_B1 + VIN GOOD – C4 B4 EOC ISO_B2 CHARGE CONTROL DIG_IO1 DIG_IO2 ISO_B3 + D1 I2C INTERFACE AND CONTROL LOGIC C1 CV-MODE RECHARGE + – DIG_IO3 WEAK BATTERY DETECTION SINK + – BATTERY: OPEN SHORT + – TRICKLE BAT_SNS 3.4V D4 1.
Data Sheet ADP5061 Table 9. DIG_IO1 Operation The ADP5061 includes a number of significant features to optimize charging and functionality including • • • • Thermal regulation for maximum performance USB host current-limit accuracy: ±5%. Termination voltage accuracy: ±1%. Battery thermistor input with automatic charger shutdown in the event that the battery temperature exceeds limits (compliant with the JEITA Li-Ion battery charging temperature specification).
ADP5061 Data Sheet Trickle Charge Mode Fast Charge Mode (Constant Current) A deeply discharged Li-Ion cell can exhibit a very low cell voltage, making it unsafe to charge the cell at high current rates. The ADP5061 charger uses a trickle charge mode to reset the battery pack protection circuit and lift the cell voltage to a safe level for fast charging. A cell with a voltage below VTRK_DEAD is charged with the trickle mode current, ITRK_DEAD.
Data Sheet ADP5061 Safety Timer Battery Voltage Limit to Prevent Charging While in charger mode, if the watchdog timer expires, the ADP5061 charger initiates the safety timer, tSAFE (see the Watchdog Timer section). If the processor has programmed charging parameters by the time the charger initiates the safety timer, the ILIM is set to the default value. Charging continues for a period of tSAFE, and then the charger switches off and sets the CHARGER_STATUS bits.
ADP5061 Data Sheet THERMAL MANAGEMENT BATTERY ISOLATION FET Isothermal Charging The ADP5061 charger features an integrated battery isolation FET for power path control. The battery isolation FET isolates a deeply discharged Li-Ion cell from the system power supply in both trickle and fast charge modes, thereby allowing the system to be powered at all times. The ADP5061 includes a thermal feedback loop that limits the charge current when the die temperature exceeds TLIM (typically 115°C).
Data Sheet ADP5061 SOURCE PHASE VBATL LOGIC STATUS tBAT_OK VBATH ISOURCE SINK PHASE LOGIC STATUS tBAT_OK OPEN OR SHORT OPEN ISO_Bx 10544-030 OPEN OPEN ISINK ISO_Bx Figure 30. Sink Phase ISO_Bx SHORT OR LOW BATTERY tBAT_SHR SHORT ISO_Bx 10544-031 tBAT_OK LOGIC STATUS SHORT OPEN OR SHORT SHORT SHORT ISINK tBAT_OK LOGIC STATUS ISOURCE LOGIC STATUS ISO_Bx TRICKLE CHARGE VBAT_SHR SOURCE PHASE VBATH VBATL ITRK_DEAD SINK PHASE Figure 31.
ADP5061 Data Sheet JEITA Li-Ion Battery Temperature Charging Specification I2C. Alternatively, the JEITA1 or JEITA2 can be set as enabled to default by factory programming. The ADP5061 is compliant with the JEITA1 and JEITA2 Li-Ion battery charging temperature specifications as outlined in Table 14 and in Table 16, respectively.
Data Sheet ADP5061 POWER-ON RESET RESET ALL REGISTERS NO NO IC OFF VINOK SYSTEM OFF YES ENABLE CHARGER NO ENABLE LDO YES ENABLE CHARGER LDO MODE NO YES LOW BATTERY CHG YES VBAT_SNS < VCHG_VLIM NO YES NO TO CHARGING-MODE Figure 32. Simplified Battery and VIN Connect Flowchart Rev.
ADP5061 Data Sheet TO CHARGING MODE TO IC OFF YES RUN BATTERY DETECTION tSTART NO EXPIRED YES VBAT_SNS < VTRK NO POWER-DOWN TRICKLE CHARGE VINOK FAST CHARGE NO VINOK YES VBAT_SNS < VTRK YES NO IVIN < ILIM YES NO IBUSLIM = HIGH IVIN = ILIM NO THERMLIM = HIGH TEMP = TLIM YES YES WATCHDOG EXPIRED START tSAFE IBUS = 100 mA NO tWD EXPIRED TEMP < TLIM NO YES TFAULT OR BAD BATTERY YES tSAFE OR tTRK EXPIRED tWD EXPIRED YES NO WATCHDOG EXPIRED START tSAFE IBUS = 100 mA NO tSA
Data Sheet ADP5061 I2C INTERFACE the master after the 8-bit data byte has been written (see Figure 34 for an example of the I2C write sequence to a single register). The ADP5061 increments the subaddress automatically and starts receiving a data byte at the next register until the master sends an I2C stop as shown in Figure 35. The ADP5061 includes an I2C-compatible serial interface for control of the charging and LDO functions, as well as for a readback of system status registers.
ADP5061 Data Sheet I2C REGISTER MAP See the Factory Programmable Options section for programming option details. Note that a blank cell indicates a bit that is not used. Table 17. I2C Register Map Register Addr.
Data Sheet ADP5061 REGISTER BIT DESCRIPTIONS In Table 18 through Table 33, the following abbreviations are used: R is read only, W is write only, R/W is read/write, and N/A means not applicable. Table 18. Manufacturer and Model ID, Register Address 0x00 Bit No. [7:4] [3:0] Bit Name MANUF[3:0] MODEL[3:0] Access R R Default 0001 1001 Description The 4-bit manufacturer identification bus The 4-bit model identification bus Table 19. Silicon Revision Register, Register Address 0x01 Bit No.
ADP5061 Data Sheet Table 21. Termination Settings, Register Address 0x03 Bit No. [7:2] Bit Name VTRM[5:0] Access R/W Default 100011 = 4.20 V [1:0] CHG_VLIM[1:0] R/W 00 = 3.2 V Description Termination voltage programming bus. The values of the float voltage can be programmed to the following values: 001111 = 3.80 V. 010000 = 3.82 V. 010001 = 3.84 V. 010010 = 3.86 V. 010011 = 3.88 V. 010100 = 3.90 V. 010101 = 3.92 V. 010110 = 3.94 V. 010111 = 3.96 V. 011000 = 3.98 V. 011001 = 4.00 V. 011010 = 4.
Data Sheet ADP5061 Table 22. Charging Current Settings, Register Address 0x04 Bit No. 7 [6:2] Bit Name Not used ICHG[4:0] Access R R/W Default Description See Table 39 for the model-specific default values. [1:0] ITRK_DEAD[1:0] R/W 10 = 20 mA Fast charge current programming bus. The values of the constant current charge can be programmed to the following values: 00000 = 50 mA. 00001 = 100 mA. 00010 = 150 mA. 00011 = 200 mA. 00100 = 250 mA. 00101 = 300 mA. 00110 = 350 mA. 00111 = 400 mA.
ADP5061 Data Sheet Bit No. [4:3] Bit Name VTRK_DEAD[1:0] Access R/W Default 01 = 2.5 V [2:0] VWEAK[2:0] R/W 011 = 3.0 V Description Trickle to fast charge dead battery voltage programming bus. The values of the trickle to fast charge threshold can be programmed to the following values: 00 = 2.0 V. 01 = 2.5 V. 10 = 2.6 V. 11 = 2.9 V. Weak battery voltage rising threshold. 000 = 2.7 V. 001 = 2.8 V. 010 = 2.9 V. 011 = 3.0 V. 100 = 3.1 V. 101 = 3.2 V. 110 = 3.3 V. 111 = 3.4 V. Table 24.
Data Sheet ADP5061 Bit No. 2 Bit Name EN_EOC Access R/W Default 1 Description 0 = end of charge not allowed. 1 = end of charge allowed. 1 0 Not used EN_CHG R/W 0 0 = battery charging is disabled. 1 = battery charging is enabled. Table 26. Functional Settings 2, Register Address 0x08 Bit No.
ADP5061 Data Sheet Table 28. Interrupt Active Register, Register Address 0x0A Bit No. 7 6 5 Mnemonic Not used THERM_LIM_INT WD_INT Access Default Description R R 0 0 4 TSD_INT R 0 1 = indicates an interrupt caused by isothermal charging. 1 = indicates an interrupt caused by the watchdog alarm. The watchdog timer expires within 2 sec or 4 sec, depending on the watch dog period setting of 32 sec or 64 sec, respectively. 1 = indicates an interrupt caused by an overtemperature fault.
Data Sheet ADP5061 Table 30. Charger Status Register 2, Register Address 0x0C Bit No. [7:5] Mnemonic THR_STATUS[2:0] Access R Default N/A 4 3 Not used RCH_LIM_INFO R R N/A N/A 2:0 BATTERY_STATUS[2:0] R Description THR pin status. 000 = off. 001 = battery cold. 010 = battery cool. 011 = battery warm. 100 = battery hot. 111 = thermistor OK. The recharge limit information function is activated when DIS_RCH is logic high and the CHARGER_STATUS[2:0] = 100 (binary).
ADP5061 Data Sheet Table 33. IEND Register, Register Address 0x11 Bit No. [7:5] Mnemonic IEND[2:0] Access R/W Default See Table 40 for the modelspecific default values. 4 C/20 EOC R/W 0 3 C/10 EOC R/W 0 2 C/5 EOC R/W 0 1:0 SYS_EN_SET[1:0] R/W 00 1 Description Termination current programming bus. The values of the termination current can be programmed to the following values: 000 = 12.5 mA. 001 = 32.5 mA. 010 = 52.5 mA. 011 = 72.5 mA. 100 = 92.5 mA. 101 = 117.5 mA. 110 = 142.5 mA.
Data Sheet ADP5061 APPLICATIONS INFORMATION Substituting these values in the equation yields EXTERNAL COMPONENTS CEFF = 34.3 μF × (1 − 0.15) × (1 − 0.2) ≈ 20.7 μF ISO_Sx (VOUT) Capacitor Selection To obtain stable operation of the ADP5061 in a safe way, the combined effective capacitance of the ISO_Sx capacitor and the system capacitance must not be less than 20 µF and must not exceed 100 µF at any point during operation.
ADP5061 Data Sheet VINx Capacitor Selection According to the USB 2.0 specification, USB peripherals have a detectable change in capacitance on VBUS when they are attached to a USB port. The peripheral device VBUS bypass capacitance must be at least 1 µF but not larger than 10 µF. The VINx input of the ADP5061 is tolerant of voltages as high as 20 V; however, if an application requires exposing the VINx input to voltages of up to 20 V, the voltage range of the capacitor must also be above 20 V.
Data Sheet ADP5061 PCB LAYOUT GUIDELINES VIN = 4V TO 6.7V C4 10µF GRM21BR61E106MA73 C3 E3 D3 VIN1:3 ISO_S1:3 B3 CBP C1 10nF C2 D2 GRM15XR71C103KA86 E2 C3 47µF GRM32ER61A476ME20 VDDIO R1 1.5kΩ R2 1.
ADP5061 Data Sheet POWER DISSIPATION AND THERMAL CONSIDERATIONS PISOFET = RDSON_ISO × ICHG CHARGER POWER DISSIPATION When the ADP5061 charger operates at high ambient temperatures and at maximum current charging and loading conditions, the junction temperature can reach the maximum allowable operating limit of 125°C. When the junction temperature exceeds 140°C, the ADP5061 turns off, allowing the device to cool down.
Data Sheet ADP5061 FACTORY PROGRAMMABLE OPTIONS CHARGER OPTIONS Table 38 to Table 50 list the factory programmable options of the ADP5061. In each of these tables, the selection column represents the default setting of the ADP5061ACBZ-2-R7, ADP5061ACBZ-4-R7, and ADP5061ACBZ-5-R7 models. The difference between these two models are shown in Table 39, Table 40, Table 42, and Table 50. All other default settings are the same for each model. Table 38. Default Termination Voltage Table 42.
ADP5061 Data Sheet I2C REGISTER DEFAULTS Table 47. I2C Register Default Settings Bit Name CHG_VLIM DIS_RCH I2C Register Address, Bit Location Address 0x03, Bits[D1:D0] Address 0x05, Bit D7 Option 0 = limit 3.2 V, 1 = limit 3.
Data Sheet ADP5061 DIG_IO1, DIG_IO2, and DIG_IO3 Options Table 49. DIG_IO1 Polarity Option 0 = DIG_IO1 polarity, high active operation 1 = DIG_IO1 polarity, low active operation Selection 0 = high active Table 50.
ADP5061 Data Sheet PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS 2.035 1.995 1.955 4 3 2 1 A BALL A1 IDENTIFIER B 2.635 2.595 2.555 2.00 REF C D E 0.50 REF BOTTOM VIEW TOP VIEW (BALL SIDE UP) (BALL SIDE DOWN) SEATING PLANE SIDE VIEW 1.50 REF COPLANARITY 0.04 0.360 0.320 0.280 0.270 0.240 0.210 04-18-2012-A 0.660 0.600 0.540 0.390 0.360 0.330 Figure 42.
Data Sheet ADP5061 NOTES Rev.
ADP5061 Data Sheet NOTES ©2012–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10544-0-9/13(C) www.analog.com/ADP5061 Rev.
