Datasheet

Data Sheet ADP5050

Rev. 0 | Page 41 of 60

Table 18. Register Map

Address

Name

Reg. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

0 0x00 Reserved Reserved

1 0x01 PCTRL Reserved CH5_ON CH4_ON CH3_ON CH2_ON CH1_ON

2 0x02 VID1 Reserved VID1[4:0]

3 0x03 VID23 Reserved VID3[2:0] Reserved VID2[2:0]

4 0x04 VID4 Reserved VID4[4:0]

0x05

DVS_CFG

Reserved

DVS4_ON

DVS4_INTVAL[1:0]

Reserved

DVS1_ON

DVS1_INTVAL[1:0]

6 0x06 OPT_CFG DSCG4_ON DSCG3_ON DSCG2_ON DSCG1_ON PSM4_ON PSM3_ON PSM2_ON PSM1_ON

7 0x07 LCH_CFG OVP4_ON OVP3_ON OVP2_ON OVP1_ON SCP4_ON SCP3_ON SCP2_ON SCP1_ON

8 0x08 SW_CFG FREQ3 FREQ1 PHASE4[1:0] PHASE3[1:0] PHASE2[1:0]

9 0x09 TH_CFG Reserved TEMP_TH[1:0] LVIN_TH[3:0]

10 0x0A HICCUP_CFG SYNC_OUT Reserved HICCUP4_

OFF

HICCUP3_

OFF

HICCUP2_

OFF

HICCUP1_

OFF

11 0x0B PWRGD_MASK Reserved MASK_CH4 MASK_CH3 MASK_CH2 MASK_CH1

12 0x0C LCH_STATUS Reserved TSD_LCH CH4_LCH CH3_LCH CH2_LCH CH1_LCH

13 0x0D STATUS_RD Reserved PWRG4 PWRG3 PWRG2 PWRG1

14 0x0E INT_STATUS Reserved TEMP_INT LVIN_INT PWRG4_INT PWRG3_INT PWRG2_INT PWRG1_INT

15 0x0F INT_MASK Reserved MASK_TEMP MASK_LVIN MASK_

PWRG4

MASK_

PWRG3

MASK_

PWRG2

MASK_

PWRG1

16 0x10 Reserved Reserved

17 0x11 DEFAULT_SET DEFAULT_SET[7:0]