Datasheet

Data Sheet ADP5050
Rev. 0 | Page 31 of 60
The output voltage ripple is determined by the ESR of the output
capacitor and its capacitance value. Use the following equations
to select a capacitor that can meet the output ripple requirements:
RIPPLEOUT
SW
L
RIPPLEOUT
Vf
I
C
_
_
8 ∆××
∆
=
L
RIPPLEOUT
ESR
I
V
R
∆
∆
=
_
where:
ΔI
L
is the inductor ripple current.
f
SW
is the switching frequency.
ΔV
OUT_RIPPLE
is the allowable output voltage ripple.
R
ESR
is the equivalent series resistance of the output capacitor.
Select the largest output capacitance given by C
OUT_UV
, C
OUT_OV
,
and C
OUT_RIPPLE
to meet both load transient and output ripple
requirements.
The voltage rating of the selected output capacitor must be
greater than the output voltage. The minimum rms current
rating of the output capacitor is determined by the following
equation:
12
_
L
rmsC
I
I
OUT
∆
=
INPUT CAPACITOR SELECTION
The input decoupling capacitor attenuates high frequency noise
on the input and acts as an energy reservoir. Use a ceramic capac-
itor and place it close to the PVINx pin. The loop composed of
the input capacitor, the high-side NFET, and the low-side NFET
must be kept as small as possible. The voltage rating of the input
capacitor must be greater than the maximum input voltage. Make
sure that the rms current rating of the input capacitor is larger
than the following equation:
( )
DDII
OUT
rmsC
IN
−××= 1
_
where D is the duty cycle (D = V
OUT
/V
IN
).
LOW-SIDE POWER DEVICE SELECTION
Channel 1 and Channel 2 include integrated low-side MOSFET
drivers, which can drive low-side N-channel MOSF ETs (N F ETs).
The selection of the low-side N-channel MOSFET affects the
performance of the buck regulator.
The selected MOSFET must meet the following requirements:
• Drain-to-source voltage (V
DS
) must be higher than 1.2 × V
IN
.
• Drain current (I
D
) must be greater than 1.2 × I
LIMIT_MAX
, where
I
LIMIT_MAX
is the selected maximum current-limit threshold.
• The selected MOSFET can be fully turned on at V
GS
= 4.5 V.
• Total gate charge (Qg at V
GS
= 4.5 V) must be less than 20 nC.
Lower Qg characteristics provide higher efficiency.
When the high-side MOSFET is turned off, the low-side MOSFET
supplies the inductor current. For low duty cycle applications, the
low-side MOSFET supplies the current for most of the period.
To achieve higher efficiency, it is important to select a MOSFET
with low on resistance. The power conduction loss for the low-
side MOSFET can be calculated using the following equation:
P
FET_LOW
= I
OUT
2
× R
DSON
× (1 − D)
where:
R
DSON
is the on resistance of the low-side MOSFET.
D is the duty cycle (D = V
OUT
/V
IN
).
Table 14 lists recommended dual MOSFETs for various current-
limit settings. Ensure that the MOSFET can handle thermal
dissipation due to power loss.
Table 14. Recommended Dual MOSFETs
Vendor Part No. V
DS
(V) I
D
(A)
R
DSON
(mΩ)
Qg
(nC)
Size
(mm)
IR IRFHM8363 30 10 20.4 6.7 3 × 3
IRLHS6276
20
3.4
45
3.1
2 × 2
Fairchild FDMA1024 20 5.0 54 5.2 2 × 2
FDMB3900 25 7.0 33 11 3 × 2
FDMB3800 30 4.8 51 4 3 × 2
FDC6401 20 3.0 70 3.3 3 × 3
Vishay
Si7228DN
30
23
25
4.1
3 × 3
Si7232DN 20 25 16.4 12 3 × 3
Si7904BDN 20 6 30 9 3 × 3
Si5906DU 30 6 40 8 3 × 2
Si5908DC 20 5.9 40 5 3 × 2
SiA906EDJ 20 4.5 46 3.5 2 × 2
AOS AON7804 30 22 26 7.5 3 × 3
AON7826 20 22 26 6 3 × 3
AO6800 30 3.4 70 4.7 3 × 3
AON2800
20
4.5
47
4.1
2 × 2
PROGRAMMING THE UVLO INPUT
The precision enable input can be used to program the UVLO
threshold of the input voltage, as shown in Figure 43. To limit
the degradation of the input voltage accuracy due to the internal
1 MΩ pull-down resistor tolerance, ensure that the bottom resistor
in the divider is not too large—a value of less than 50 kΩ is
recommended.
The precision turn-on threshold is 0.8 V. The resistive voltage
divider for the programmable V
IN
start-up voltage is calculated
as follows:
V
IN_STARTUP
= (0.8 nA + (0.8 V/R
BOT_EN
)) × (R
TOP_EN
+ R
BOT_EN
)
where:
R
TOP_EN
is the resistor from V
IN
to EN.
R
BOT_EN
is the resistor from EN to ground.