Datasheet

ADP5040 Data Sheet
Rev. 0 | Page 30 of 40
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
RIPPLE
RIPPLE
COUT
I
V
ESR ≤
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 7 µF and a
maximum of 40 µF.
Table 9. Suggested 10 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating
(V)
Murata X5R GRM188R60J106 0603 6.3
Taiyo Yuden X5R JMK107BJ106MA-T 0603 6.3
TDK X5R C1608JB0J106K 0603 6.3
Panasonic X5R ECJ1VB0J106M 0603 6.3
The buck regulator requires 10 µF output capacitors to guaran-
tee stability and response to rapid load variations and to transition
in and out the PWM/PSM modes. In certain applications, where
the buck regulator powers a processor, the operating state is
known because it is controlled by software. In this condition,
the processor can drive the MODE pin according to the operating
state; consequently, it is possible to reduce the output capacitor
from 10 µF to 4.7 µF because the regulator does not expect a
large load variation when working in PSM mode (see Figure 106).
SW
VIN1
VIN2
VIN3
VOUT1
VOUT2
PGND
VOUT3
C1
10µF
C2
1µF
C3
1µF
PROCESSOR
VCORE
VDDIO
MODE
GPIO1
ENx
GPIO[x:y]
3
R5
FB3
R6
R1
R2
R3
R4
VANALOG
FB1
FB2
C5
2.2µF
C4
4.7µF
C6
2.2µF
09665-098
ADP5040
MICRO PMU
V
IN
2.3V TO 5.5V
R
FLT
30Ω
L1
1µH
AVIN
ANALOG
SUBSYSTEM
Figure 106. Processor System Power Management with PSM/PWM Control
Input Capacitor
A higher value input capacitor helps to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
IN
OUT
IN
OUT
MAXLOAD
CIN
V
VVV
II
)(
)(
−
≥
To minimize supply noise, place the input capacitor as close
to the VIN pin of the buck as possible. As with the output
capacitor, a low ESR capacitor is recommended.
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 3 µF and a
maximum of 10 µF. A list of suggested capacitors is shown in
Tabl e 10.
Table 10. Suggested 4.7 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating
(V)
Murata X5R GRM188R60J475ME19D 0603 6.3
Taiyo Yuden X5R JMK107BJ475 0603 6.3
Panasonic X5R ECJ-0EB0J475M 0402 6.3
LDO EXTERNAL COMPONENT SELECTION
Feedback Resistors
Referring to Figure 103 the maximum value of Rb is not to
exceed 200 kΩ.
Output Capacitor
The ADP5040 LDOs are designed for operation with small,
space-saving ceramic capacitors, but they function with most
commonly used capacitors as long as care is taken with the ESR
value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 µF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
LDO. Transient response to changes in load current is also
affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the LDO to large
changes in load current.
When operating at output currents higher than 200 mA a
minimum of 2.2 µF capacitance with an ESR of 1 Ω or less is
recommended to ensure stability of the LDO.
Table 11. Suggested 2.2 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating
(V)
Murata
X5R GRM188B31A225K
0402 10.0
TDK X5R
C1608JB0J225KT
0402 6.3
Panasonic X5R
ECJ1VB0J225K
0402 6.3
Taiyo Yuden X5R JMK107BJ225KK-T 0402 6.3
Input Bypass Capacitor
Connecting 1 µF capacitors from VIN2 and VIN3 to ground
reduces the circuit sensitivity to printed circuit board (PCB)
layout, especially when long input traces or high source impedance
is encountered. If greater than 1 µF of output capacitance is
required, increase the input capacitor to match it.