Datasheet

UG-279 Evaluation Board User Guide
Rev. 0 | Page 8 of 12
EVALUATION BOARD SCHEMATICS AND ARTWORK
09879-009
VOUT2
VOUT1VIN1
VIN2
VIN4
J2
V
IN_2
L2
CBMF1608
L1
CBMF1608
COUT_1
10uF
C0603std
C7
1UF
C0402std
J5
VOUT1
J14
VOUT4
J9
PGND
J8
PGND
J7
VOUT3
C5
4.7uF
C0402std
C4
1UF
C0402std
JP3
Mode
1
1
2
2
3
3
J1
V
IN_1
C6
4.7uF
C0402std
COUT_3
1UF
C0402std
J13
PGND
COUT_4
1UF
C0402std
BUCK1
BUCK2
LDO1
LDO2
U1
ADP5033
VIN1
C1
VIN2
C4
VOUT3
A1
AGND
B1
SW1
D2
PGND1
D1
SW2
D3
PGND2
D4
VIN3
A2
VOUT4
A4
MODE
B2
ENA
B3
ENB
B4
VOUT1
C2
VOUT2
C3
VIN4
A3
J12
GND2
COUT_2
10uF
C0603std
JP5
EnB
1
1
2
2
3
3
JP4
EnA
1
1
2
2
3
3
J10
PGND
J6
VOUT2
J11
GND1
Figure 9. Evaluation Board Schematic of ADP5033
09879-011
Figure 10. Second Layer, Recommended Layout