Datasheet

Data Sheet ADP5023
Rev. D | Page 13 of 28
2.3
2.8
3.3
3.8
4.3 4.8 5.3
RDS
ON
(mΩ)
INPUT VOLT
AGE (V)
09703-038
+125°C
+25°C
–40°C
0
50
100
150
200
250
Figure 33. PMOS RDS
ON
vs. Input Voltage Across Temperature
1.802
1.792
0 0.3
V
OUT
(V)
I
OUT
(A)
0.1 0.2
1.793
1.794
1.795
1.796
1.797
1.798
1.799
1.800
1.801
+25°C
–40°C
+85°C
09889-049
Figure 34. LDO Load Regulation Across Temperature, V
IN3
= 3.6 V, V
OUT3
= 1.8 V
3.0
2.5
2.0
1.5
1.0
0.5
0
2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4
V
IN
(V)
V
OUT
(V)
I
OUT
= 300mA
I
OUT
= 150mA
I
OUT
= 100mA
I
OUT
= 10mA
I
OUT
= 1mA
I
OUT
= 100µA
09889-045
Figure 35. LDO Line Regulation Across Output Load, V
OUT3
= 2.8 V
0 0.05 0.10 0.15 0.20 0.25
GROUND CURRENT (µA)
I
OUT
(A)
0
5
10
15
20
25
30
35
40
45
50
09889-136
Figure 36. LDO Ground Current vs. Output Load, V
IN3
= 3.3 V, V
OUT3
= 2.8 V
2
T
1
CH1
100mV M 40.0µs A CH2 52.0mA
T 19.20%
CH2 100mA Ω
VOUT
I
OUT
09889-019
Figure 37. LDO Response to Load Transient, I
OUT3
= 1 mA to 80 mA,
V
OUT3
= 2.8 V
2
3
T
1
CH1 20.0mV
CH3 1.00V
M 100µs A CH3 4.80V
T 28.40%
VOUT
VIN
09889-014
Figure 38. LDO Response to Line Transient, V
IN
= 4.5 V to 5 V, V
OUT3
= 2.8 V