Datasheet
Table Of Contents

EVAL-ADP5020
Rev. 0 | Page 18 of 24
DAUGHTERBOARD SCHEMATIC
07794-027
XSHTDWN
+VO1
+VO1
+VO2
+VO2S
+VO3
VDDA
VDD1A
+VO1S
-VO1S
+VO2
-VO2S
VDD1B
VDD2
VDD3
+VD1S
-VD1S
SDA
SCL
SYNC
EN/GPIO
+VD2S
-VD2S
VDDIO
-VO1
-VO1
-VO2
-VO2
-VO3
+VD3S
+VDA
-VDA
-VD3S
+VO1
+VO2
+VO1
+VO3
-VO3
-VO1
-VO1
-VO2
-VD1S
EN/GPIO
SYNC
VDDIO
VDDA
VDD2
VDD1A
VDD1B
VDD3
+VDA
+VO2S
-VO2S
+VO1S
-VO1S
XSHTDWN
-VO3S
+VO3S
SDA
SCL
+VD1S
-VO3S
+VO3S
-VD3S
+VD3S
+VD2S
-VD2S
-VDA
+VO2
-VO2
+VO3
TP5TP5
1
TP20TP20
1
C6
2.2UF
C6
2.2UF
C11 10UFC11 10UF
TP3
TP3
1
LK12LK12
1
2
R2
10K
R2
10K
L2 2.2uHL2 2.2uH
BUCK1BUCK2LDO
U1
ADP5020_LFCSP
BUCK1BUCK2LDO
U1
ADP5020_LFCSP
VOUT1A
15
SW1
17
PGND1
16
VOUT1B
14
SW2
20
VOUT2
2
PGND2
1
VANA
12
XSHTDWN
10
AGND
4
DGND
6
VDDA
3
VDD1
18
VDD2
19
VDD3
13
VDD_IO
9
SDA
7
SCL
8
SYNC
5
EN/GPIO
11
J5
HEADER 10X2
J5
HEADER 10X2
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
JP1
INTF
JP1
INTF
1
1
2
2
3
3
C3
4.7UF
C3
4.7UF
JP3
INTF
JP3
INTF
1
1
2
2
3
3
L3 2.2uHL3 2.2uH
L1 2.2uH
L1 2.2uH
C4
1UF
C4
1UF
R5
49.9
R5
49.9
R1
10K
R1
10K
C8
1UF
C8
1UF
LK10LK10
1
2
TP25TP25
1
LK13LK13
1
2
C2
10UF
C2
10UF
JP5
INTF
JP5
INTF
1
1
2
2
3
3
TP4TP4
1
TP24
TP24
1
TP21TP21
1
C9
1UF1UF
C9
R4
10
R4
10
JP4
INTF
JP4
INTF
1
1
2
2
3
3
J6
HEADER 10X2
J6
HEADER 10X2
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
C7
2.2UF
C7
2.2UF
C5
10UF
C5
10UF
LK15
LK15
1
2
C10
1UF
TP22TP22
1
Figure 27. Daughterboard Schematic