Datasheet
Table Of Contents

EVAL-ADP5020
Rev. 0 | Page 17 of 24
07794-025
VBOARD
VBOARD
VBOARD
VBOARD
VBOARD
+VBB
+VLDO
+VBK
XSHTDWN
VBOARD
VDDIO
EN/GPIO
VBOARD
SYNC
+VBB
-VBB
+VBK
-VBK
+VLDO
-VLO
XSHTDWN
AGND
ForceEN
EXT FREQ.
EN = High
EN = Low
Buck-Boost ON
LDO ON
Buck ON
XSHTDWN = High
9.6MHz/19.2MHz Ext. Frequency
EN/GPIO = High
+ VOUT_BB
- VOUT_BB
+ VOUT_BK
- VOUT_BK
+ VOUT_LDO
- VOUT_LDO
XSHTDWN
PGND
AGND
R3
680
R3
680
LK12
2 Way Link
LK12
2 Way Link
1
3
2
R37
10K
R37
10K
TP10TP10
1
SM2
CLR
SM2
CLR
2
1
3
4
5
D9
LED
D9
LED
LK11
2 Way Link
LK11
2 Way Link
1 3
2
R1
680
R1
680
TP9TP9
1
R30
1M
R30
1M
R13
680
R13
680
C1
10uF
C1
10uF
R34
1M
R34
1M
R31
1M
R31
1M
TP2TP2
1
TP4TP4
1
+
-
U113
ADCMP600
+
-
U113
ADCMP600
3
4
1
5
2
R33
2.2K
R33
2.2K
G
S
D
Q3
FDN335N
G
S
D
Q3
FDN335N
C2
0.1uF
C2
0.1uF
TP5TP5
1
G
S
D
Q4
FDN335N
G
S
D
Q4
FDN335N
D1
LED
D1
LED
R36
0
R36
0
D22
BAT54TW-7-F
D22
BAT54TW-7-F
A1
1
A2
2
A3
3
K3
4
K2
5
K1
6
G
S
D
Q6
FDN335N
G
S
D
Q6
FDN335N
D7
LED
D7
LED
TP3TP3
1
R32
1M
R32
1M
R35
1M
R35
1M
C3
10uF
C3
10uF
D5
LED
D5
LED
TP6TP6
1
R7
680
R7
680
G
S
D
Q5
FDN335N
G
S
D
Q5
FDN335N
C4
0.1uF
C4
0.1uF
TP7TP7
1
TP8TP8
1
D4
LED
D4
LED
R5
680
R5
680
G
S
D
Q7
FDN335N
G
S
D
Q7
FDN335N
Figure 26. Motherboard Schematic—Interface Section