Datasheet

ADP3654
Rev. 0 | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
1
INA 2
PGND
3
INB 4
NC
8
OUTA 7
VDD
6
OUTB 5
ADP3654
TOP VIEW
(Not to Scale)
NOTES
1. NC = NO CONNECT.
2
. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY
CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS
ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE. IT IS
RECOMMENDED TO HAVE THE EXPOSED PAD AND THE
PGND PIN CONNECTED ON THE PCB.
09054-004
Figure 4. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 NC No Connect.
2 INA Input Pin for Channel A Gate Driver.
3 PGND Ground. This pin should be closely connected to the source of the power MOSFET.
4 INB Input Pin for Channel B Gate Driver.
5 OUTB Output Pin for Channel B Gate Driver.
6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 μF to 5 μF ceramic capacitor.
7 OUTA Output Pin for Channel A Gate Driver.
8 NC No Connect.
9 EPAD
Exposed Pad. The exposed pad of the package is not directly connected to any pin of the package, but it is
electrically and thermally connected to the die substrate, which is the ground of the device. It is recommended
to have the exposed pad and the PGND pin connected on the PCB.