Datasheet

ADP2503/ADP2504 Data Sheet
Rev. C | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
PVIN, VIN, SW1, SW2, VOUT, SYNC, EN, FB −0.3 V to +6 V
PGND to AGND
−0.3 V to 0.3 V
Operating Ambient Temperature Range −40°C to +125°C
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Soldering Conditions JEDEC J-STD-020
ESD Human Body Model ±2000 V
ESD Charged Device Model ±1500 V
ESD Machine Model ±100 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP2503/ADP2504 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient tempera-
ture (T
A
) does not guarantee that the junction temperature (T
J
)
is within the specified temperature limits. In applications with
high power dissipation and poor thermal resistance, the maximum
ambient temperature may have to be derated. In applications
with moderate power dissipation and low PCB thermal resis-
tance, the maximum ambient temperature can exceed the
maximum limit as long as the junction temperature is within
specification limits. T
J
of the device is dependent on T
A
, the
power dissipation (P
D
) of the device, and the junction-to-
ambient thermal resistance (θ
JA
) of the package. Maximum
T
J
is calculated from T
A
and P
D
using the following formula:
T
J
= T
A
+ (P
D
× θ
JA
)
θ
JA
of the package is based on modeling and calculation using a
4-layer board. The junction-to-ambient thermal resistance is
highly dependent on the application and board layout. In applica-
tions where high maximum power dissipation exists, close
attention to thermal board design is required. The value of θ
JA
may vary, depending on PCB material, layout, and environmental
conditions. The specified values of θ
JA
are based on a 4-layer,
4 inch × 3 inch circuit board. Refer to JEDEC JESD 51-9 for
detailed information on the board construction.
THERMAL RESISTANCE
θ
JA
are specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Package Type
θ
JA
Unit
10-Lead LFCSP (QFN) 84 °C/W
ESD CAUTION