Datasheet
Data Sheet ADP2442
Rev. 0 | Page 33 of 36
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Good printed circuit board (PCB) layout is essential for obtaining
optimum performance. Poor PCB layout degrades the output
voltage ripple; the load, line, and feedback regulation; and the
EMI and electromagnetic compatibility performance. For
optimum layout, refer to the following guidelines:
• Use separate analog and power ground planes. Connect the
ground reference of sensitive analog circuitry, such as the
output voltage divider component and the compensation
and frequency resistor, to analog ground. In addition, connect
the ground references of power components, such as input
and output capacitors, to power ground. Connect both
ground planes to the exposed pad of the ADP2442.
• Place one end of the input capacitor as close as possible to
the VIN pin, and connect the other end to the closest
power ground plane.
• Place a high frequency filter capacitor between the VIN
and PGND pins, as close as possible to the PGND pin.
• VCC is the internal regulator output. Place a 1 µF capacitor
between the VCC and AGND pins and another 1 µF
capacitor between the VCC and PGND pins. Place the
capacitors as close as possible to the pins.
• Ensure that the high current loop traces are as short and
wide as possible. Make the high current path from C
IN
through L, C
OUT
, and the power ground plane back to C
IN
as short as possible. To accomplish this, ensure that the
input and output capacitors share a common power
ground plane.
• Make the high current path from the PGND pin through
L and C
OUT
back to the power ground plane as short as
possible. To do this, ensure that the PGND pin is tied to
the PGND plane as close as possible to the input and output
capacitors (see Figure 70).
• Connect the ADP2442 exposed pad to a large copper plane
to maximize its power dissipation capability.
• Place the feedback resistor divider network as close as possible
to the FB pin to prevent noise pickup. Keep the length of the
trace connecting the top of the feedback resistor divider to
the output as short as possible and, to avoid noise pickup,
also keep it away from the high current traces and switch
node. Place an analog ground plane on either side of the FB
trace to further reduce noise pickup.
• The placement and routing of the compensation components
are critical for optimum performance of ADP2442. Place
the compensation components as close as possible to the
COMP pin. Use 0402 sized compensation components to
allow closer placement, which in turn reduces parasitic noise.
• Surround the compensation components with AGND to
prevent noise pickup.
• The FREQ pin is sensitive to noise; therefore, place the
frequency resistor as close as possible to the FREQ pin and
route it with minimal trace length.
• Ground the small signal components to the analog
ground path.
Figure 70. High Current Trace
Figure 71. PCB Top Layer Placement
FB
COMP
EN
PGOOD
FREQ
SYNC/
MODE
PGND
VIN
SW
BST
AGND
VCC
ADP2442
V
OUT
V
IN
C4
C3 C5
C6 C7
R2
R3
R5
R8
R6
R9
C10
V
OUT
NOTES
1. THICK LINE INDICATES HIGH CURRENT TRACE.
10667-066
V
IN
L1
C
IN
C
BST
C
OUT
V
IN
V
OUT
VCC
FB
COMP
FREQ
PGND
AGND
10667-067