Datasheet

ADP2442 Data Sheet
Rev. 0 | Page 22 of 36
Figure 60. Capacitance vs. DC Voltage
For example, to attain 20 μF of output capacitance with an output
voltage of 5 V while providing some margin for temperature
variation, use a 22 μF capacitor with a voltage rating of 25 V
and a 10 μF capacitor with a voltage rating of 25 V in parallel.
This configuration ensures that the output capacitance is suffi-
cient under all conditions and, therefore, that the device
exhibits stable behavior.
BOOST CAPACITOR
The boost pin (BST) is used to power up the internal driver for the
high-side power MOSFET. In the ADP2442, the high-side power
MOSFET is an N-channel device to achieve high efficiency in
mid and high duty cycle applications. To power up the high-side
driver, a capacitor is required between the BST and SW pins.
The size of this boost capacitor is critical because it affects the
light load functionality and efficiency of the device. Therefore,
choose a boost ceramic capacitor with a value between 10 nF
and 22 nF with a voltage rating of 50 V, placing the capacitor as
close as possible to the IC. It is recommended to use a boost
capacitor within this range because a capacitor beyond 22 nF
can cause the LDO to reach the current-limit threshold.
VCC CAPACITOR
The ADP2442 has an internal regulator to power up the internal
controller and the low-side driver. The VCC pin is the output of
the internal regulator. The internal regulator provides the pulse
current when the low-side driver turns on. Therefore, it is recom-
mended that a 1 µF ceramic capacitor be placed between the VCC
and PGND pins as close as possible to the IC and that a 1 µF
ceramic capacitor be placed between the VCC and AGND pins.
LOOP COMPENSATION
The ADP2442 uses a peak current mode control architecture
for excellent load and line transient response. This control
architecture has two loops: an inner current loop and an external
voltage loop.
The inner current loop senses the current in the low-side switch
and controls the duty cycle to maintain the average inductor cur-
rent. To ensure stable operation when the duty cycle is above
50%, slope compensation is added to the inner current loop.
The external voltage loop senses the output voltage and adjusts
the duty cycle to regulate the output voltage to the desired value. A
transconductance amplifier with an external series RC network
connected to the COMP pin compensates for the external
voltage loop, as shown in Figure 61.
Figure 61. RC Compensation Network
LARGE SIGNAL ANALYSIS OF THE LOOP
COMPENSATION
The control loop can be broken down into the following three
sections:
• V
OUT
to V
COMP
• V
COMP
to I
L
• I
L
to V
OUT
Figure 62. Large Signal Model
0
30.0
24.6
19.2
13.8
8.40
3.00
5 10
DC BIAS VOLTAGE (V)
CAPACITANCE (µF)
15 20 25
22µF/25V
10µF/25V
10667-157
ADP2442
VFB
g
m
COMP
AGND
R
COMP
C
COMP
0.6V
10667-154
PULSE-WIDTH
MODULATOR
Gm
V
REF
= 0.6V
INDUCTOR
CURRENT
SENSE
V
OUT
V
IN
V
COMP
C
COMP
C
OUT
R
COMP
R
LOAD
ADP2442
I
L
g
m
10667-255