Datasheet

Data Sheet ADP2441
Rev. A | Page 17 of 32
Coincident Tracking
The most common mode of tracking is coincident tracking. In this
method, the slope of the slave voltage matches that of the master
voltage, as shown in Figure 51. As the master voltage rises, the
slave voltage rises identically. Eventually, the slave voltage reaches
its regulation voltage, at which point the internal reference takes
over the regulation while the SS/TRK input continues to increase,
thus preventing itself from influencing the output voltage.
VOLTAGE (V)
TIME
MASTER VOLTAGE
SLAVE VOLTAGE
10581-049
Figure 51. Coincident Tracking
For coincident tracking, select resistor values such that R
TRK_TOP
= R
TOP
and R
TRK_BOT
= R
BOTTOM
in Equation 1.
Ratiometric Tracking
In the ratiometric tracking scheme, the master and the slave
voltages rise with different slopes.
VOLTAGE (V)
TIME
MASTER VOLTAGE
SLAVE VOLTAGE
10581-050
Figure 52. Ratiometric Tracking
For ratiometric tracking in which the master voltage rises faster
than the slave voltage (as shown in Figure 52), select R
TRK_TOP
≥
R
TOP
and R
TRK_BOT
= R
BOTTOM
in Equation 1.
UNDERVOLTAGE LOCKOUT (UVLO)
The UVLO function prevents the IC from turning on while the
input voltage is below the specified operating range to avoid an
undesired operating mode. If the input voltage drops below the
specified range, the UVLO function shuts off the device. The
rising input voltage threshold for the UVLO function is 4.2 V
with 200 mV hysteresis. The 200 mV of hysteresis prevents the
regulator from turning on and off repeatedly with slow voltage
ramp on the VIN pin.
PRECISION ENABLE/SHUTDOWN
The ADP2441 features a precision enable pin (EN) that can be used
to enable or shut down the device. The ±5% accuracy lends
itself to using a resistor divider from the VIN pin (or another
external supply) to program a desired UVLO threshold that is
higher than the fixed internal UVLO of 4.2 V. The hysteresis is
100 mV.
If a resistor divider is not used, a logic signal can be applied. A
logic high enables the part, and a logic low forces the part into
shutdown mode.
VIN
EN
FREQ AGND COMP
SW
ADP2441
R1
R2
V
OUT
V
IN
BST
FB
10581-051
Figure 53. Precision Enable Used as a Programmable UVLO
CURRENT-LIMIT AND SHORT-CIRCUIT
PROTECTION
The ADP2441 has a current-limit comparator that compares
the current sensed across the low-side power MOSFET to the
internally set reference current. If the sensed current exceeds
the reference current, the high-side power MOSFET is not
turned on in the next cycle and the low-side power MOSFET
stays on until the inductor current ramps down below the
current-limit level.
If the output is overloaded and the peak inductor current exceeds
the preset current limit for more than eight consecutive clock
cycles, the hiccup mode current-limit condition occurs. The
output goes to sleep for 6 ms, during which time the output is
discharged, the average power dissipation is reduced, and the
part wakes up with a soft start period. If the current-limit condition
is triggered again, the output goes to sleep and wakes up after 6 ms.
Figure 32 shows the current-limit hiccup mode when the output
is shorted to PGND.
THERMAL SHUTDOWN
If the ADP2441 junction temperature rises above 150°C, the
thermal shutdown circuit turns off the switching regulator. Extreme
junction temperatures can be the result of high current operation,
poor circuit board design, or high ambient temperature. A 25°C
hysteresis is included so that when a thermal shutdown occurs,
the ADP2441 does not return to normal operation until the
junction temperature drops below 125°C. Soft start is active
upon each restart cycle.