Datasheet

ADP2441 Data Sheet
Rev. A | Page 16 of 32
ADJUSTABLE FREQUENCY
The ADP2441 features a programmable oscillator frequency with
a resistor connected between the FREQ and AGND pins.
At power-up, the FREQ pin is forced to 1.2 V and current flows
from the FREQ pin to AGND; the current value is based on the
resistor value on the FREQ pin. Then, the same current is
replicated in the oscillator to set the switching frequency. Note
that the resistor connected to the FREQ pin should be placed as
close as possible to the FREQ pin (see the Applications
Information section for more information).
POWER GOOD
The PGOOD pin is an open-drain output that indicates the
status of the output voltage. When the voltage of the FB pin is
between 92% and 109% of the internal reference voltage, the
PGOOD output is pulled high, provided there is a pull-up
resistor connected to the pin. When the voltage of the FB pin is
not within this range, the PGOOD output is pulled low to
AGND. The PGOOD threshold is shown in Figure 48.
Likewise, the PGOOD pin is pulled low to AGND when the
input voltage is below the internal UVLO threshold, when the
EN pin is low, or when a thermal shutdown event has occurred.
% OF V
OUT
SET
% OF V
OUT
SET
V
OUT
RISING
V
OUT
FALLING
110
90
116
84
POWER
GOOD
OVERVOLAGEUNDERVOLTAGE
PGOOD
UNDERVOLTAGEPOWER
GOOD
100
100
10581-047
Figure 48. PGOOD Threshold
In a typical application, a pull-up resistor connected between the
PGOOD pin and an external supply is used to generate a logic
signal. This pull-up resistor should range in value from 30 kΩ
to 100 kΩ, and the external supply should be less than 5.5 V.
SOFT START
The ADP2441 soft start feature allows the output voltage to ramp
up in a controlled manner, limiting the inrush current during
startup. An external capacitor connected between the SS/TRK
and AGND pins is required to program the soft start time.
The programmable soft start feature is useful when a load
requires a controlled voltage slew rate at startup. When the
regulator powers up and soft start is enabled, the internal
1 A current source charges the external soft start capacitor,
establishing a voltage ramp slope at the SS pin, as shown in
Figure 49. The soft start period ends when the soft start ramp
voltage exceeds the internal reference of 0.6 V. The ADP2441
also features an internal default soft start time of 2 ms. For more
information, see the Applications Information section.
10581-149
CH1 2.00V
B
W
CH2 1.00V
CH3 5.00V
M10.0ms A CH1 2.52V
3
1
2
V
OUT
ENABLE
SS
V
IN
= 24V
V
OUT
= 5V
f
SW
= 700kHz
LOAD = 1A
EXTERNAL SS = 10nF
Figure 49. External Soft Start
TRACKING
The ADP2441 has a tracking feature that allows the output
voltage to track an external voltage. This feature is especially
useful in a system where power supply sequencing and tracking
is required.
The ADP2441 SS/TRK pin is connected to the internal error
amplifier. The internal error amplifier includes three inputs: the
internal reference voltage, the SS/TRK voltage, and the feedback
voltage. The error amplifier regulates the feedback voltage to
the lower of the other two voltages. To track a master voltage,
tie the SS/TRK pin to a resistor divider from the master voltage
as shown in Figure 50.
MASTER
VOLTAGE
COMP
REF
SS/TRK
SW
FB
ADP2441
R
TRK_TOP
R
TRK_BOT
R
TOP
V
OUT
R
BOTTOM
10581-048
Figure 50. Tracking Feature Block Diagram
The ratio of the slave output voltage to the master voltage is a
function of the two dividers as follows:



















BOTTRK
TOPTRK
BOTTOM
TOP
MASTER
OUT
R
R
R
R
V
V
_
_
1
1
(1)