Datasheet

Data Sheet ADP2384
Rev. 0 | Page 17 of 24
Select the largest output capacitance given by C
OUT_UV
, C
OUT_OV
,
and C
OUT_RIPPLE
to meet both load transient and output ripple
performance.
The selected output capacitor voltage rating should be greater than
the output voltage. The rms current rating of the output capacitor
must be larger than the value that is calculated by
I
C
OUT
_RMS
=
12
L
I
PROGRAMMING THE INPUT VOLTAGE UVLO
The ADP2384 has a precision enable input that can be used to
program the UVLO threshold of the input voltage (see Figure 31).
EN
EN CMP
ADP2384
1.17V
4µA
1µA
PVIN
R
TOP_EN
R
BOT_EN
10725-030
Figure 31. Programming the Input Voltage UVLO
Use the following equation to calculate R
TOP_EN
and R
BOT_EN
:
R
TOP_EN
=
μA1V17.1μA5V07.1
V17.1V07.1
__
××
××
FALLINGINRISINGIN
VV
R
BOT_EN
=
V17.1μA5
V17.1
__
_
×
×
ENTOPRISINGIN
ENTOP
RV
R
where:
V
IN_RISING
is the V
IN
rising threshold.
V
IN_FALLING
is the V
IN
falling threshold.
COMPENSATION DESIGN
For peak current mode control, the power stage can be simplified
as a voltage controlled current source supplying current to the
output capacitor and load resistor. It is composed of one domain
pole and a zero that is contributed by the output capacitor ESR.
The control-to-output transfer function is based on the following:
G
VD
(s) =
()
()
OUT
COMP
Vs
Vs
= A
VI
× R ×
1
2
1
2
Z
P
s
f
s
f
π
π

+

××


+

××

f
Z
=
OUTESR
CR ×××
π
2
1
f
P
=
OUTESR
CRR ×+×× )(2
1
π
where:
A
VI
= 8.7 A/V.
R is the load resistance.
C
OUT
is the output capacitance.
R
ESR
is the equivalent series resistance of the output capacitor.
The ADP2384 uses a transconductance amplifier for the error
amplifier and to compensate the system. Figure 32 shows the
simplified, peak current mode control, small signal circuit.
R
ESR
R
+
g
m
R
C
C
CP
C
OUT
C
C
R
TOP
R
BOT
+
A
VI
V
OUT
V
COMP
V
OUT
10725-031
Figure 32. Simplified Peak Current Mode Control, Small Signal Circuit
The compensation components, R
C
and C
C
, contribute a zero,
and R
C
and the optional C
CP
contribute an optional pole.
The closed-loop transfer equation is as follows:
T
V
(s) =
×
+
×
+
CPC
m
TOPBOT
BOT
CC
g
RR
R
)(
1
1
sG
s
CC
CCR
s
sCR
VD
CPC
CPCC
CC
×
×
+
××
+×
××+
The following design guideline shows how to select the R
C
, C
C
,
and C
CP
compensation components for ceramic output capacitor
applications:
1. Determine the cross frequency, f
C
. Generally, f
C
is between
f
SW
/12 and f
SW
/6.
2. Calculate R
C
using the following equation:
R
C
=
VIm
COUTOUT
Ag
fCV
××
××××
V6.0
2
π
3. Place the compensation zero at the domain pole, f
P
; then
determine C
C
by using the following equation:
C
C
=
C
OUTESR
R
CRR ×+ )(
4. C
CP
is optional. It can be used to cancel the zero caused by
the ESR of the output capacitor.
C
CP
=
C
OUTESR
R
CR ×
ADIsimPower DESIGN TOOL
The ADP2384 is supported by the ADIsimPowerdesign tool
set. ADIsimPower is a collection of tools that produce complete
power designs that are optimized for a specific design goal. The
tools enable the user to generate a full schematic and bill of
materials and calculate performance in minutes. ADIsimPower
can optimize designs for cost, area, efficiency, and part count,
while taking into consideration the operating conditions and
limitations of the IC and all real external components. For more
information about theADIsimPower design tools, refer to
www.analog.com/ADIsimPower. The tool set is available from
this website, and users can request an unpopulated board.