Datasheet
Table Of Contents
- Features
- Applications
- Typical Application Circuit
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Control Scheme
- PWM Mode
- PFM Mode
- Precision Enable/Shutdown
- Separate Input Voltages
- Internal Regulator (INTVCC)
- Bootstrap Circuitry
- Low-Side Driver
- Oscillator
- Synchronization
- Soft Start
- Peak Current-Limit and Short-Circuit Protection
- Voltage Tracking
- Parallel Operation
- Power Good
- Overvoltage Protection
- Undervoltage Lockout
- Thermal Shutdown
- Applications Information
- Design Example
- External Components Recommendation
- Typical Application Circuits
- Outline Dimensions

Data Sheet ADP2323
Rev. A | Page 3 of 32
FUNCTIONAL BLOCK DIAGRAM
+
–
+
0.6V
I
SS1
SS1
FB1
COMP1
Σ
AMP1
CONTROL
LOGIC
AND MOSFET
DRIVER WITH
ANTICROSS
PROTECTION
BST1
SW1
I1
MAX
I1
MAX
HICCUP
MODE
NFET1
VDRV
DL1
0.7V
0.54V
OVP
PGOOD1
PVIN1
UVLO
EN1
CURRENT-
LIMIT
SELECTION
OSCILLATOR
PGND
SCFG
SYNC
RT
CLK1
CLK2
SLOPE RAMP1
SLOPE RAMP2
5V REGULATOR
EN1_BUF
ADP2323
EN1_BUF
EN2_BUF
INTVCC
PVIN1
GND
MODE
MODE_BUF
SKIP MODE
THRESHOLD
MODE_BUF
SKIP
CMP1
SLOPE RAMP1
CLK1
–
+
ZERO CURRENT
CMP
VDRV
+
TRK1
+
–
+
–
1.2V
4µA1µA
OCP
CMP1
+
–
+
–
+
–
+
–
DRIVER
DRIVER
BOOST
REGULATOR
+
–
+
0.6V
I
SS2
SS2
FB2
COMP2
Σ
AMP2
CONTROL
LOGIC
AND MOSFET
DRIVER WITH
ANTICROSS
PROTECTION
BST2
SW2
I2
MAX
I2
MAX
HICCUP
MODE
NFET2
VDRV
DL2
0.7V
0.54V
OVP
PGOOD2
PVIN2
UVLO
EN2
CURRENT-
LIMIT
SELECTION
EN2_BUF
SKIP MODE
THRESHOLD
MODE_BUF
SKIP
CMP2
SLOPE RAMP2
CLK2
–
+
ZERO CURRENT
CMP
+
TRK2
+
–
+
–
1.2V
4µA1µA
OCP
CMP2
+
–
+
–
+
–
+
–
DRIVER
DRIVER
BOOST
REGULATOR
09357-042
A
CS1
A
CS2
Figure 3. Functional Block Diagram