Datasheet

Evaluation Board User Guide UG-300
Rev. A | Page 5 of 8
EVALUATION BOARD SCHEMATIC AND LAYOUT
10013-003
ADP2126
A1 A2
MODE VIN
B1 B2
SW EXTCLK
C1 C2
FB GND
MODE
L1
U1
SW
VIN
GND
EXTCLK
V
OUT
1.20V
V
IN
(2.1V TO 5.5V)
C
OUT
C
IN1
C
IN2
C
IN3
Figure 2. ADP2126 Evaluation Board Schematic
10013-005
Figure 3. ADP2126
LAYOUT GUIDELINES
For high efficiency, good regulation, and stability with the
ADP2126, a well-designed and manufactured PCB is essential.
Use the following guidelines when designing PCBs:
• Keep the low ESR input capacitor, CIN, close to VIN
and GND.
• Keep high current traces as short and as wide as possible.
• Avoid routing high impedance traces near any node
connected to SW or near the inductor to prevent radiated
noise injection.
• Keep the low ESR output capacitor, COUT, close to the FB
and GND pins of the ADP2126. Long trace lengths from
the part to the output capacitor add series inductance and
may cause instability or increased ripple.