Datasheet

Data Sheet ADP2119/ADP2120
Rev. A | Page 17 of 24
TRACKING
The ADP2119/ADP2120 have a tracking input, TRK, that allows
the output voltage to track another voltage (master voltage).
The tracking input is especially useful in core and I/O voltage
tracking for FPGAs, DSPs, and ASICs.
The internal error amplifier includes three positive inputs: the
internal reference voltage, the soft start voltage, and the TRK
voltage. The error amplifier regulates the FB voltage to the
lowest of the three voltages. To track a master voltage, tie the
TRK pin to a resistor divider from the master voltage. If the
tracking function is not used, connect the TRK pin to VIN.
OSCILLATOR AND SYNCHRONIZATION
To synchronize the ADP2119/ADP2120, drive an external clock
at the SYNC/MODE pin. The frequency of the external clock
can be in the 1 MHz to 2 MHz range. During synchronization,
the regulator operates in CCM mode only, and the switching
frequency is in phase with the external clock.
CURRENT LIMIT AND SHORT-CIRCUIT PROTECTION
The ADP2119/ADP2120 have a peak current limit protection
circuit to prevent current runaway. When the inductor peak
current reaches the current limit value, the high-side MOSFET
turns off and the low-side MOSFET turns on until the next cycle
starts. The overcurrent counter increments during this time. If
the overcurrent counter count exceeds 10, the part enters hiccup
mode and both the high-side MOSFET and low-side MOSFET
are turned off. The part remains in this mode for 4096 clock cycles
and then attempts to restart from soft start. If the current limit
fault has cleared, the part resumes normal operation. Otherwise,
it reenters hiccup mode again after counting 10 current limit
violations.
OVERVOLTAGE PROTECTION (OVP)
The output voltage is continuously monitored by a comparator
through the FB pin, which is at 0.6 V (typical) under normal
operation. This comparator is set to activate when the FB voltage
exceeds 0.66 V (typical), thus indicating an output overvoltage
condition. If the voltage remains above this threshold for 16
clock cycles, the high-side MOSFET turns off and the low-side
MOSFET turns on until the current through the low-side MOSFET
reaches the limit (−0.6 A for forced continuous conduction mode
and 0 A for PFM mode). Thereafter, both the MOSFETs are
held in the off state until FB falls below 0.54 V (typical), at this
point, the part restarts. The behavior of PGOOD under this
condition is described in the Power Good section.
UNDERVOLTAGE LOCKOUT (UVLO)
Undervoltage lockout circuitry is integrated in the ADP2119/
ADP2120. If the input voltage drops below 2.1 V, the part shuts
down and both the power switch and synchronous rectifier turn
off. When the voltage rises again above 2.2 V, the soft start period is
initiated, and the part is enabled.
THERMAL SHUTDOWN
If the ADP2119/ADP2120 junction temperatures rise above 150°C,
the thermal shutdown circuit turns off the regulators. Extreme
junction temperatures can be the result of high current operation,
poor circuit board design, and/or high ambient temperature. A
25°C hysteresis is included so that if thermal shutdown occurs, the
part does not return to operation until the on-chip temperature
drops below 125°C. When coming out of thermal shutdown,
soft start is initiated.
POWER GOOD (PGOOD)
PGOOD is an active high, open-drain output and requires a
resistor to pull it up to a voltage. A high indicates that the voltage
on the FB pin (and therefore the output voltage) is within ±10%
of the desired value. A low on this pin indicates that the voltage
on the FB pin is not within ±10% of the desired value. There is a
16 cycle waiting period after FB is detected as being out of bounds.