Datasheet

Data Sheet ADP2116
Rev. A | Page 31 of 36
5. Calculate the compensation component values of the
feedback loop by using the following equation:








×








×=
REF
OUTOUT
CS
m
CROSS
COMP
V
VC
Gg
f
R
)π2(
9.0
where:
g
m
= 550 µS.
G
CS
= 4 A / V.
V
REF
= 0.6 V.
V
OUT
= 1.2 V.
C
OUT
= 0.8 × (47 + 100) µF (capacitance derated by 20% to
account for dc bias).
From Equation 18,
R
COMP
= 30 kΩ.
Substituting R
COMP
in Equation 19 yields C
COMP
= 820 pF.
Table 11. Channel 2 Circuit Settings
Circuit Parameter Setting Value
Output Voltage, V
OUT
Nominal 1.2 V
Reference Voltage, V
REF
Typical 0.6 V
Error Amplifier Transconductance, g
m
Typical 550 µS
Current-Sense Gain, G
CS
Typical
4 A/V
Switching Frequency, f
SW
See Step 2 600 kHz
Crossover Frequency, f
CROSS
1/12 f
SW
50 kHz
Zero Frequency, f
ZERO
1/8 f
CROSS
6.25 kHz
Output Inductor, L
OUT
Step 3 2.2 µH
Output Capacitor, C
OUT
Step 4 (47 + 100) µF
Compensation Resistor, R
COMP
See Equation 18 30 kΩ
Compensation Capacitor, C
COMP
See Equation 19 820 pF
SYSTEM CONFIGURATION
Complete the following steps to further configure the ADP2116
for this design example:
1. Set the switching frequency (f
SW
) to 600 kHz (see Table 5)
by connecting the FREQ pin through an 8.2 kΩ resistor
to GND.
2. Tie SCFG to VDD and use the CLKOUT signal to
synchronize other converters on the same board with the
ADP2116.
3. Tie OPCFG through an 82 kΩ resistor to GND for 3 A/3 A
maximum output current operation and to enable pulse
skip mode at light load conditions (see Table 7).
A schematic of the ADP2116 as configured in the design example
described in the Design Example section is shown in Figure 71.
Other configurations are shown in Figure 72 to Figure 74. An
application circuit of a single interleaved, dual-phase, 6 A output
is shown in Figure 72. The schematic in Figure 73 depicts an
application circuit with a 3A/2A dual-output load and a 300 kHz
switching frequency, and the schematic of a dual-output converter
that works at 1.2 MHz with an adjustable V
OUT1
and V
OUT2
is shown
in Figure 74.
Table 12 provides the recommended inductor, output capacitor,
and compensation component values for a set of popular input
and output voltage combinations.
Table 12. Selection Table of L, C
OUT
, and Compensation Values
f
SW
(kHz) V
IN
(V) V
OUT
(V) Maximum Load (A)
1
L (µH) C
OUT
(µF) R
COMP
(kΩ) C
COMP
(pF)
300
5
3.3
3.0
6.8
100
30
1600
300
5 2.5 3.0 5.6 122 (22 + 100) 27 1800
300
5 1.8 3.0 4.7 147 (47 + 100) 22 2200
300
5 1.2 3.0 3.3 247 (47 + 2 × 100) 30 1600
600
5
3.3
3.0
3.3
47
33
750
600
5 2.5 3.0 3.3 69 (22 + 47) 30 820
600
5 1.8 3.0 2.2 100 30 820
600
5 1.2 3.0 2.2 147 (47 + 100) 30 820
600
5
1.2
6.0
2 × 2.2
294 (2 × 47 + 2 × 100)
15
1600
1200
5 2.5 3.0 1.0 47 33 390
1200
5 1.8 3.0 1.0 57 (10 + 47) 33 390
1200
5 1.2 3.0 1.0 69 (22 + 47) 27 470
1200
5
1.2
6.0
2 × 1.0
141 (3 × 47)
13
910
1200
5 0.8 3.0 1.0 122 (22 + 100) 33 390
1
A maximum load of 6.0 A is available only with the single interleaved, dual-phase, 6 A output configuration (see Figure 72).