Datasheet

Data Sheet ADP2116
Rev. A | Page 29 of 36
DESIGN EXAMPLE
The external component selection procedure from the Control
Loop Compensation section is used for this design example.
Table 9. 2-Channel, Step-Down DC-to-DC Converter
Requirements
Parameter Specification
Additional
Requirements
Input Voltage, V
IN
5.0 V ±10% None
Output Voltage for
Channel 1, V
OUT1
2.5 V, 3 A,
1% V
OUT
p-p ripple
Maximum load
step: 1.5 A to 3 A,
5% droop maximum
Output Voltage for
Channel 2, V
OUT2
1.2 V, 3 A,
1% V
OUT
p-p ripple
Maximum load
step: 1.5 A to 3 A,
5% droop maximum
Pulse Skip Feature Enabled None
CHANNEL 1 CONFIGURATION AND COMPONENTS
SELECTION
Complete the following steps to configure Channel 1:
1. For a target output voltage (V
OUT
) of 2.5 V, connect the
V1SET pin through a 27 kΩ resistor to GND (see Table 4).
Because one of the fixed output voltage options is chosen,
the feedback pin (FB1) must be connected directly to the
output of Channel 1, V
OUT1
.
2. Estimate the duty cycle (D) range. Ideally,
IN
OUT
V
V
D =
(20)
Therefore, for an output voltage of 2.5 V and a nominal
input voltage (V
IN
) of 5.0 V, the nominal duty cycle (D
NOM
)
is 0.5. Using the maximum input voltage (10% greater than
the nominal, or 5.5 V) results in the minimum duty cycle
(D
MIN
) of 0.45, whereas using the minimum input voltage
(10% less than the nominal, or 4.5 V) results in the maximum
duty cycle (D
MAX
) of 0.56.
However, the actual duty cycle will be larger than the
calculated values to compensate for the power losses in the
converter. Therefore, add 5% to 7% to the value calculated
for the maximum load.
Based on the estimated duty cycle range, choose the
switching frequency (f
SW
) according to the minimum and
maximum duty cycle limitations, as shown in Figure 64.
If the input voltage (V
IN
) is 5 V and the output voltage (V
OUT
)
is 2.5 V for Channel 1, choose a switching frequency of
600 kHz with a maximum duty cycle of 0.8. This frequency
option provides the smallest sized solution. If a higher
efficiency is required, choose the 300 kHz option. However,
the actual PCB footprint area of the converter will be larger
because of the bigger inductor and output capacitors.
3. Select the inductor by using the following equation:
IN
OUT
SW
L
OUT
IN
V
V
fI
VV
L ×
×
−
=
Δ
)(
In this equation, V
IN
= 5 V, V
OUT
= 2.5 V, ΔI
L
= 0.3 × I
L
= 0.9 A,
and f
SW
= 600 kHz, which results in L = 2.32 µH.
Therefore, when L = 3.3 µH (the closest minimum
standard value from Table 8) in Equation 5, ΔI
L
= 0.63 A.
Although the maximum output current required is 3 A,
the maximum peak current is 4.5 A for the current-limit
condition (see Table 7). Therefore, the inductor should be
rated for a peak current of 4.5 A and an average current of
3 A for reliable circuit operation.
4. Select the output capacitor by using the following equations:
)(8 ESRΔIΔVf
ΔI
C
LRIPPLE
SW
L
OUT_MIN
×−××
≅








×
×≅
DROOPSW
OUT_STEPOUT_MIN
ΔVf
ΔIC
3
The first equation is based on the output ripple (ΔV
RIPPLE
),
whereas the second equation is based on the transient load
performance requirements that allow, in this case, 5% maxi-
mum deviation. As previously mentioned, perform these
calculations and then choose a capacitor based on the larger
calculated capacitor size.
In this case, the following values are used:
ΔI
L
= 0.63 A
f
SW
= 600 kHz
ΔV
RIPPLE
= 25 mV (1% of 2.5 V)
ESR = 3 mΩ (typical for ceramic capacitors)
ΔI
OUT_STEP
= 1.5 A
ΔV
DROOP
= 0.125 V (5% of 2.5 V)
Therefore, the output ripple based calculation dictates that
C
OUT
= 6.2 µF, whereas the transient load based calculation
dictates that C
OUT
= 60 µF. To meet both requirements, use
the larger capacitor value. As previously mentioned in the
Output Capacitor Selection section, the capacitance value
decreases when dc bias is applied; therefore, select a higher
value. In this case, the next higher value is 69 µF (a 47 µF
capacitor in parallel with 22 µF) with a minimum voltage
rating of 6.3 V.