Datasheet

ADP2116 Data Sheet
Rev. A | Page 26 of 36
EXTERNAL COMPONENTS SELECTION
ADIsimPower DESIGN TOOL
The ADP2116 is supported by ADIsimPower design tool set.
ADIsimPower is a collection of tools that produce complete
power designs optimized for a specific design goal. The tools
enable the user to generate a full schematic, bill of materials,
and calculate performance in minutes. ADIsimPower can
optimize designs for cost, area, efficiency, and parts count
while taking into consideration the operating conditions and
limitations of the IC and all real external components. For
more information about ADIsimPower design tools, refer to
www.analog.com/ADIsimPower. The tool set is available from
this website, and users can also request an unpopulated board
through the tool.
INPUT CAPACITOR SELECTION
The input current to a buck converter is pulsating in nature. The
current is zero when the high-side switch is off and approximately
equal to the load current when the high-side switch is on. Because
this pulsation occurs at reasonably high frequencies (300 kHz to
1.2 MHz), the input bypass capacitor supplies most of the high
frequency current (ripple current), allowing the input power source
to supply only the average (dc) current. The input capacitor needs a
sufficient ripple current rating to handle the input ripple, as well
as an ESR that is low enough to mitigate the input voltage ripple.
For the ADP2116, place a 22 µF, 6.3 V X5R ceramic capacitor
close to the VINx pin for each channel. X5R or X7R dielectrics
are recommended with a voltage rating of 6.3 V or 10 V. Y 5 V
and Z5U dielectrics are not recommended due to their poor
temperature and dc bias characteristics.
VDD RC FILTER
It is recommended that the input power, V
IN
, be apply to the
VDD pin through a low-pass RC filter, as shown in Figure 68.
Connecting a 10 Ω resistor in series with V
IN
and a 1 µF, 6.3 V X5R
(or X7R) ceramic capacitor between VDD and GND creates a
16 kHz (−3 dB) low-pass filter that effectively attenuates voltage
glitches on the input power rail caused by the switching regulator.
This provides a clean power supply to the internal, sensitive analog
and digital circuits in the ADP2116, ensuring robust operation.
VDD
GND
ADP2116
1µF
10Ω
V
IN
08436-068
Figure 68. Low-Pass Filter at VDD
INDUCTOR SELECTION
The high switching frequency of the ADP2116 allows for minimal
output voltage ripple even with small inductors. The size of the
inductor is a trade-off between efficiency and transient response. A
small inductor leads to larger inductor current ripple that provides
excellent transient response but degrades efficiency. Due to the
high switching frequency of the ADP2116, shielded ferrite core
inductors are recommended for their low core losses and low EMI.
As a guideline, the inductor peak-to-peak current ripple, ΔI
L
, is
typically set to be one-third of the maximum load current for
optimal transient response and efficiency.
3
)(
)(MAXLOAD
SW
IN
OUT
IN
OUT
L
I
LfV
VVV
I ≈
××
−×
=∆
)(
)(3
MAX
LOAD
IN
SW
OUT
IN
OUT
IDEAL
IVf
VVV
L
××
−××
=⇒
(5)
where:
V
IN
is the input voltage on the VINx terminal.
V
OUT
is the desired output voltage.
f
SW
is the converter switching frequency.
The internal slope compensation introduces additional limitations
on the optimal inductor value for stable operation because the
internal ramp is scaled for each V
OUT
setting. The limits for
different V
IN
, V
OUT
, and f
SW
combinations are listed in Table 8.
Table 8. Minimum and Maximum Inductor Values
f
SW
(kHz) V
IN
(V) V
OUT
(V) Min L (µH) Max L (µH)
300
5
3.3
6.8
10
300 5 2.5 5.6 15
300 3.3 2.5 5.6 6.8
300 5 1.8 4.7 12
300 3.3 1.8 4.7 8.2
300
5
1.5
2.2
12
300 3.3 1.5 2.2 8.2
300 5 1.2 2.2 10
300 3.3 1.2 2.2 8.2
300 5 0.8 1.5 6.8
300 3.3 0.8 1.5 6.8
600 5 3.3 3.3 4.7
600 5 2.5 3.3 6.8
600 3.3 2.5 3.3 3.3
600 5 1.8 2.2 6.8
600 3.3 1.8 2.2 3.3
600 5 1.5 1.5 5.6
600 3.3 1.5 1.5 4.7
600
5
1.2
1.5
4.7
600 3.3 1.2 1.5 3.3
600 5 0.8 1.0 3.3
600 3.3 0.8 1.0 3.3
1200 5 2.5 1.0 3.3
1200 5 1.8 1.0 3.3
1200 3.3 1.8 1.0 2.2
1200 5 1.5 0.8 2.2
1200 3.3 1.5 0.8 2.2
1200 5 1.2 0.8 2.2
1200 3.3 1.2 0.8 2.2
1200 5 0.8 0.47 1.5
1200 3.3 0.8 0.47 1.5