Datasheet

Data Sheet ADP2114
Rev. B | Page 31 of 40
In this case, the following values are substituted for the
variables in Equation 18:
g
m
= 550 µs
G
CS
= 4A/V
V
REF
= 0.6 V
V
OUT
= 3.3 V
C
OUT
= 0.8 × 47 µF (capacitance derated by 20% to account
for dc bias).
From Equation 18,
R
COMP
= 27 kΩ.
Substituting R
COMP
in Equation 19 yields C
COMP
= 1000 pF.
Table 10. Channel 1 Circuit Settings
Circuit Parameter
Setting
Value
Output Voltage, V
OUT
Step 1
3.3 V
Reference Voltage, V
REF
Fixed, typical 0.6 V
Error Amp Transconductance, g
m
Fixed, typical 550 µs
Current Sense Gain, C
CS
Fixed, typical 4 A/V
Switching Frequency, f
SW
Step 2 600 kHz
Crossover Frequency, f
C
1/12 f
SW
50 kHz
Zero Frequency, f
ZERO
1/8 f
CROSS
6.25 kHz
Output Inductor, L
OUT
Step 3 3.3 µH
Output Capacitor, C
OUT
Step 4 47 µF, 6.3 V
Compensation Resistor, R
COMP
Equation 18 27 kΩ
Compensation Capacitor, C
COMP
Equation 19 1000 pF
CHANNEL 2 CONFIGURATION AND COMPONENTS
SELECTION
Complete the following steps to configure Channel 2:
1. For the target output voltage, V
OUT
= 1.8 V, connect the
V2SET pin through a 15 kΩ resistor to GND (see Table 4).
Because one of the fixed output voltage options is chosen,
the feedback pin (FB2) must be directly connected to the
output of Channel 2, V
OUT2
.
2. Estimate the duty-cycle, D, range (see Equation 20). Ideally,
IN
OUT
V
V
D =
That gives the duty cycle for the 1.8 V output voltage and
the nominal input voltage of D
NOM
= 0.36 at V
IN
= 5 . 0 V.
The minimum duty cycle for the maximum input voltage (10%
above the nominal) is D
MIN
= 0.33 at V
IN
maximum = 5.5 V.
The maximum duty cycle for the minimum input voltage (10%
less than nominal) is D
MAX
= 0.4 at V
IN
minimum = 4.5 V.
However, the actual duty cycle is larger than the calculated
values to compensate for the power losses in the converter.
Therefore, add 5% to 7% at the maximum load.
The switching frequency (f
SW
) of 600 kHz, which is chosen
based on the Channel 1 requirements, meets the duty cycle
ranges that have been previously calculated. Therefore, this
switching frequency is acceptable.
3. Select the inductor by using Equation 5.
IN
OUT
SW
L
OUT
IN
V
V
fI
VV
L ×
×
−
=
Δ
)(
In Equation 5, V
IN
= 5 V, V
OUT
= 1.8 V, ΔI
L
= 0.3 × I
L
=
0.6 A, and f
SW
= 600 kHz, which results in L = 2.9 µH.
Therefore, when L = 3.3 µH (the closest standard value) in
Equation 3, ΔI
L
= 0.582 A.
Although the maximum output current required is 2 A, the
maximum peak current is 3.3 A under the current limit
condition (see Table 7). Therefore, the inductor should be
rated for 3.3 A of peak current and 3 A of average current
for reliable circuit operation under all conditions.
4. Select the output capacitor by using Equation 8 and
Equation 9.
)
-(
8 ESR
ΔIΔV
f
ΔI
C
LRIPPLE
SW
L
OUT_MIN
×
××
≅








×
×≅
DROOPSW
OUT_STEPOUT_MIN
ΔVf
ΔI
C
3
Equation 8 is based on the output ripple (ΔV
RIPPLE
), and
Equation 9 is for capacitor selection based on the transient
load performance requirements that allow, in this case, 5%
maximum deviation. As mentioned earlier, perform these
calculations and choose whatever equation yields the larger
capacitor size.
In this case, the following values are substituted for the
variables in Equation 8 and Equation 9:
ΔI
L
= 0.582 A
f
SW
= 600 kHz
ΔV
RIPPLE
= 18 mV (1% of 1.8 V)
ESR = 3 mΩ (typical for ceramic capacitors)
ΔI
OUT_STEP
= 1 A
ΔV
DROOP
= 0.09 V (5% of 1.8 V)
The output ripple based calculation (see Equation 8) dictates
that C
OUT
= 7.7 µF, whereas the transient load based
calculation (see Equation 9) dictates that C
OUT
= 55 µF. To
meet both requirements, choose the latter. As previously
mentioned in the Control Loop Compensation section, the
capacitor value reduces with applied dc bias; therefore, select
a higher value. In this case, choose a 47 µF/6.3 V capacitor
and a 22 µF/6.3 V capacitor in parallel to meet the
requirements.