Datasheet

Data Sheet ADP2114
Rev. B | Page 25 of 40
SETTING THE OSCILLATOR FREQUENCY
The ADP2114 channels can be set to operate in one of the three
preset switching frequencies: 300 kHz, 600 kHz, or 1.2 MHz.
For 300 kHz operation, connect the FREQ pin to GND. For
600 kHz or 1.2 MHz operation, connect a resistor between the
FREQ pin and GND, as shown in Table 5.
Table 5. Oscillator Frequency Setting
R
FREQ
(Ω) ± 5% f
SW
(kHz)
0 to GND 300
8.2 k to GND 600
27 k to GND 1200
Choice of the switching frequency depends on the required
dc-to-dc conversion ratio and is limited by the minimum and
maximum controllable duty cycle shown on Figure 72. This is
due to the requirement of minimum on and minimum off times
for current sensing and robust operation. The choice of
switching frequency is also determined by the need for small
external components. For small, area limited power solutions,
use of higher switching frequencies is recommended.
100
90
80
70
60
50
40
30
20
10
0
200 400 600 800 1000 1200
DUTY-CYCLE LIMITS (%)
SWITCHING FREQUENCY (kHz)
MAXIMUM LIMIT
MINIMUM LIMIT; V
IN
= 2.75V
MINIMUM LIMIT; V
IN
= 3.3V
MINIMUM LIMIT; V
IN
= 5.5V
08143-072
Figure 72. Duty Cycle Working Limits
For single output, multiphase applications that operate at close
to 50% duty cycle, it is recommended to use the 1.2 MHz
switching frequency to minimize crosstalk between the phases.
SYNCHRONIZATION AND CLKOUT
The ADP2114 can be configured to output an internal clock or
synchronize to an external clock at the STNC/CLKOUT pin.
The SYNC/CLKOUT pin is a bidirectional pin configured by
the SCFG pin, as shown in Table 6.
Table 6. SYNC/CLKOUT Configuration Setting
SCFG SYNC/CLKOUT
GND Input
VDD Output
The converter switching frequency, f
SW
, is half of the synchroni-
zation frequency f
SYNC
/f
CLKOUT
as shown in Equation 4, irrespective
of whether SYNC/CLKOUT is configured as an input or output.
f
SYNC/
f
CLKOUT
= 2 × f
SW
(4)
An external clock can be applied to the SYNC/CLKOUT pin
when configured as an input to synchronize multiple ADP2114s
to the same external clock. The f
SYNC
range is 400 kHz to 4 MHz,
which produces f
SW
in the 200 kHz to 2 MHz range. See Figure 73
for an illustration.
VDD
SYNC
SCFG
FREQ
27kΩ
( f
SW
= f
SYNC
/2)
ADP2114
VDD
SYNC
SCFG
FREQ
27kΩ
(
f
SW
=
f
SYNC
/2)
ADP2114
TO OTHER ADP2114
V
IN
f
SYNC
EXTERNAL CLOCK (2.4MHz)
08143-073
Figure 73. Synchronization with External Clock (f
SW
= 1.2 MHz in This Case)
When synchronizing to an external clock, the switching
frequency f
SW
must be set close to half of the expected external
clock frequency by appropriately terminating the FREQ pin as
shown in Table 5.
VDD
SYNC
SCFG
FREQ
8.2kΩ
(f
SW
= f
SYNC
/2)
ADP2114
VDD
CLKOUT
SCFG
FREQ
8.2kΩ
(f
SW
= 2 ×
f
SW
)
ADP2114
V
IN
f
SYNC
= 2 ×
f
SW
TO OTHER ADP2114
NOTES
1.
f
SW
= 600kHz SET FOR BOTH ADP2114.
08143-074
Figure 74. ADP2114 to SYNC with Another ADP2114
(Note that the SCFG of the master is tied to VDD.)
The ADP2114 can also be configured to output a clock signal
on the SYNC/CLKOUT pin to synchronize multiple ADP2114s
to it (see Figure 74). The CLKOUT signal is 90º phase shifted to
the internal clock of the channels so that the master ADP2114
and the slave channels are out of phase (see Figure 75 for
additional information).
CH3 5.0V
CH1 5.0V
CH4 5.0V
M1.0µs A CH4 3.00V
4
3
1
CHANNEL 1 SW
CHANNEL 2 SW
INTERNAL CLKOUT
08143-075
Figure 75. CLKOUT Waveforms