Datasheet

ADP1878/ADP1879 Data Sheet
Rev. B | Page 4 of 40
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
ADP1878ACPZ-0.6-R7/
ADP1879ACPZ-0.6-R7
600 kHz
On Time V
IN
= 5 V, V
OUT
= 2 V, T
J
= 25°C 500 540 605 ns
Minimum On Time V
IN
= 20 V, V
OUT
= 0.8 V 82 110 ns
Minimum Off Time 65% duty cycle (maximum) 340 400 ns
ADP1878ACPZ-1.0-R7/
ADP1879ACPZ-1.0-R7
1.0 MHz
On Time V
IN
= 5 V, V
OUT
= 2 V, T
J
= 25°C 285 312 360 ns
Minimum On Time V
IN
= 20 V 52 85 ns
Minimum Off Time 45% duty cycle (maximum) 340 400 ns
OUTPUT DRIVER CHARACTERISTICS
High-Side Driver
Output Source Resistance I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 2.20 3 Ω
Output Sink Resistance I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.72 1 Ω
Rise Time
2
t
r, DRVH
BST − SW = 4.4 V, C
IN
= 4.3 nF (see Figure 59) 25 ns
Fall Time
2
t
f, DRVH
BST − SW = 4.4 V, C
IN
= 4.3 nF (see Figure 60) 11 ns
Low-Side Driver
Output Source Resistance I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 1.5 2.2 Ω
Output Sink Resistance I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.7 1 Ω
Rise Time
2
t
r,DRVL
V
REG
= 5.0 V, C
IN
= 4.3 nF (see Figure 60) 18 ns
Fall Time
2
t
f,DRVL
V
REG
= 5.0 V, C
IN
= 4.3 nF (see Figure 59) 16 ns
Propagation Delays
DRVL Fall to DRVH Rise
2
t
tpdhDRVH
BST − SW = 4.4 V (see Figure 59) 15.7 ns
DRVH Fall to DRVL Rise
2
t
tpdhDRVL
BST − SW = 4.4 V (see Figure 60) 16 ns
SW Leakage Current I
SWLEAK
BST = 25 V, SW = 20 V, V
REG
= 5 V 110 µA
Integrated Rectifier
Channel Impedance I
SINK
= 10 mA 22.3 Ω
PRECISION ENABLE THRESHOLD
Logic High Level V
IN
= 2.9 V to 20 V, V
REG
= 2.75 V to 5.5 V 605 634 663 mV
Enable Hysteresis V
IN
= 2.9 V to 20 V, V
REG
= 2.75 V to 5.5 V 31 mV
COMP VOLTAGE
COMP Clamp Low Voltage V
COMP(LOW)
Tie EN pin to VREG to enable device
(2.75 V ≤ V
REG
≤ 5.5 V)
0.47 V
COMP Clamp High Voltage V
COMP(HIGH)
(2.75 V ≤ V
REG
≤ 5.5 V) 2.55 V
COMP Zero Current Threshold V
COMP_ZCT
(2.75 V ≤ V
REG
≤ 5.5 V) 1.10 V
THERMAL SHUTDOWN T
TMSD
Thermal Shutdown Threshold Rising temperature 155 °C
Thermal Shutdown Hysteresis 15 °C
CURRENT LIMIT
Hiccup Current-Limit Timing COMP = 2.4 V 6 ms
OVERVOLTAGE AND POWER-
GOOD THRESHOLDS
PGOOD
FB Power-Good Threshold FB
PGD
V
FB
rising during system power up 542 566 mV
FB Power-Good Hysteresis 34 55 mV
FB Overvoltage Threshold FB
OV
V
FB
rising during overvoltage event, I
PGOOD
= 1 mA 691 710 mV
FB Overvoltage Hysteresis 35 55 mV
PGOOD Low Voltage During Sink V
PGOOD
I
PGOOD
= 1 mA 143 200 mV
PGOOD Leakage Current PGOOD = 5 V 1 100 nA
1
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure 59 and Figure 60), C
GATE
= 4.3 nF, and the high- and low-side
MOSFETs being Infineon BSC042N03MS G.
2
Not automatic test equipment (ATE) tested.