Datasheet

Data Sheet ADP1877
Rev. D | Page 19 of 32
Table 6. CS Gain Setting Selection Table for Some Popular Configurations
I
LPP
= 33% Load ACS = 3 ACS = 6 ACS = 12 ACS = 24
R
DSON
(mΩ) Load (A) V
CS
Min (V) V
CS
Max (V) V
CS
Min (V) V
CS
Max (V) V
CS
Min (V) V
CS
Max (V) V
CS
Min (V) V
CS
Max (V)
1.5 25 0.73 0.9 0.71 1.01 0.7 1.3 0.6 1.80
2 25 0.73 0.9 0.70 1.10 0.7 1.4
2 20 0.73 0.9 0.71 1.03 0.7 1.3
3 20 0.72 1.0 0.69 1.17 0.6 1.6
5 15 0.71 1.0 0.68 1.27 0.6 1.8
7 10 0.72 1.0 0.68 1.24 0.6 1.7
10 10 0.70 1.1 0.65 1.45
15 8 0.69 1.2 0.63 1.59
18 8 0.68 1.3 0.61 1.76
20 7 0.68 1.2 0.61 1.73
25 5 0.69 1.2 0.63 1.62
30 5 0.68 1.3 0.60 1.80
40 5 0.65 1.4
60 3 0.66 1.4
80 2 0.67 1.3
100 2 0.65 1.4
120 2 0.63 1.6
INPUT CAPACITOR SELECTION
The input current to a buck converter is a pulse waveform. It is
zero when the high-side switch is off and approximately equal
to the load current when it is on. The input capacitor carries the
input ripple current, allowing the input power source to supply
only the direct current. The input capacitor needs sufficient
ripple current rating to handle the input ripple, as well as an
ESR that is low enough to mitigate input voltage ripple. For the
usual current ranges for these converters, it is good practice to use
two parallel capacitors placed close to the drains of the high-side
switch MOSFETs (one bulk capacitor of sufficiently high current
rating and a 10 F ceramic decoupling capacitor, typically).
Select an input bulk capacitor based on its ripple current rating.
First, determine the duty cycle of the output.
IN
OUT
V
D
The input capacitor RMS ripple current is given by
)1( DDII
ORMS
Where I
O
is the output current, and D is the duty cycle.
The minimum input capacitance required for a particular load is
SWESRO
PP
O
MININ
fDRIV
DDI
C
)(
)1(
,
Where V
PP
is the desired input ripple voltage, and R
ESR
is the
equivalent series resistance of the capacitor.
If an MLCC capacitor is used, the ESR is near 0, then the
equation is simplified to
SW
PP
O
MININ
fV
DD
IC
)1(
,
The capacitance of MLCC is voltage dependent. The actual
capacitance of the selected capacitor must be derated accordingly.
In addition, add more bulk capacitance, such as by using
electrolytic or polymer capacitors, as necessary for large step
load transisents. Make sure the current ripple rating of the bulk
capacitor exceeds the minimum input current ripple of a
particular design.
INPUT FILTER
Normally the input pin, VIN, with a 0.1 µF or greater value bypass
capacitor to AGND, is sufficient for filtering out any unwanted
switching noise. However, depending on the PCB layout, some
switching noises can be passed down to the ADP1877 internal
circuitry; therefore, it is recommended to have a low pass filter at
the VIN pin. Connecting a resistor, between 2 Ω and 5 Ω, in series
with VIN and a 1 µF ceramic capacitor between VIN and AGND
creates a low pass filter that effectively filters out any unwanted
glitches caused by the switching regulator. Keep in mind that the
input current could be larger than 100 mA when driving large
MOSFETs. A 100 mA across a 5 Ω resistor creates a 0.5 V drop,
which is the same voltage drop in VCCO. In this case, a lower
resistor value is desirable.
VIN
ADP1877
VIN
AGND
2 TO 5
1µF
08299-010
Figure 33. Input Filter Configuration