Datasheet
Data Sheet ADP1874/ADP1875
Rev. A | Page 25 of 44
09347-181
690mV
640mV
600mV
530mV
FB
HYSTERESIS (50mV)
OUTPUT OVERVOLTAGE
PGOOD DEASSERT
PGOOD
REASSERT
PGOOD
ASSERTION
AT POWER-UP
PGOOD
DEASSERTION
AT POWER DOWN
SOFT-START
V
EXT
PGOOD
0V
0V
t
PGD
t
PGD
t
PGD
t
PGD
Figure 80. Power Good Timing Diagram, t
PGD
= 12 µs (Diagram May Look Disproportionate for Illustration Purposes.)
09347-182
SLAVE
R
TRK2
1kΩ
R
TRK1
1kΩ
R
PGD
V
EXT
C
SS
10kΩ
R
TOP2
1kΩ
R
BOT2
1kΩ
VREG
1.2V V
OUT2 (SLAVE)
EN
FB
GND
PGOOD
SS
TRACK
PGND
MASTER
10kΩ
R
TOP1
R
BOT1
VREG
1.8V V
OUT1 (MASTER)
EN
FB
GND
PGND
0.9V
Figure 81. Coincident Tracking Circuit Implementation
09347-184
SLAVE
R
TRK2
500Ω
R
TRK1
1kΩ
R
PGD
V
EXT
C
SS
10kΩ
R
TOP2
1kΩ
R
BOT2
1kΩ
VREG
1.2V V
OUT2 (SLAVE)
EN
FB
GND
PGOOD
SS
TRACK
PGND
MASTER
10kΩ
R
TOP1
R
BOT1
VREG
2.5V V
OUT1 (MASTER)
EN
FB
GND
PGND
1.7V
Figure 82. Ratiometric Tracking Circuit Implementation
VOLTAGE TRACKING
The ADP1874/ADP1875 feature a voltage-tracking function that
facilitates proper power-up sequencing in applications that require
tracking a master voltage. In this manner, the user is free to
impose a master voltage that typically comes with a selectable
or programmable ramp rate on slave or secondary power rails.
To impose any voltage tracking relationship, the master voltage
rise time must be longer than the slave voltage soft start period.
This is particularly important in applications such as I/O voltage
sequencing and core voltage applications where specific power
sequencing is required.
Tracking is made possible by four inputs to the error amplifier,
three of which are input pins to the IC. The TRACK and SS pins
are positive inputs, and the FB pin provides the negative feedback
from the output voltage via the divider network. The fourth input
to the amplifier is the reference voltage of 0.6 V. The negative
feedback pin (FB pin) regulates the output voltage to the lowest
of the three positive inputs (TRACK, SS, and 0.6 V reference).
In all tracking configurations, the slave output can be set to as
low as 0.6 V for a given operating condition. The master voltage
must have a longer rise time than the slaves programmed soft start
period; otherwise, the tracking relationship will not be observed
at the slave output.
Coincident and ratiometric tracking are two possible tracking
configuration options offered by the ADP1874/ADP1875.
Coincident tracking is the most commonly used tracking
technique. It is primarily used in core and I/O sequencing
applications. The ramp rate of the master voltage is fully
imposed onto the ramp rate of the slave output voltage until it
has reached its regulation setpoint. Connecting the TRACK pin,
by differentially tapping onto the master voltage via a resistive
divider of similar ratio to the slave feedback divider network,
is depicted in Figure 83.
09347-083
MASTER VOLTAGE
SLAVE VOLTAGE
TIME (ms)
OUTPUT VOLTAGE (V)
Figure 83. Coincident Tracking: Master Voltage—Slave Voltage Tracking
Relationship