Datasheet

ADP1874/ADP1875 Data Sheet
Rev. A | Page 22 of 44
HS
CLIM
ZERO
CURRENT
REPEATED CURRENT-LIMIT
VIOLATION DETECTED
A PREDETERMINED NUMBER
OF PULSES IS COUNTED TO
ALLOW THE CONVERTER
TO COOL DOWN
SOFT START IS
REINITIALIZED TO
MONITOR IF THE
VIOLATION
STILL EXISTS
09347-071
Figure 73. Idle Mode Entry Sequence Due to Current-Limit Violation
HICCUP MODE DURING SHORT CIRCUIT
A current-limit violation occurs when the current across the
source and drain of the lower side MOSFET exceeds the current-
limit setpoint. When 16 current-limit violations are detected,
the controller enters idle mode and turns off the MOSFETs for
6 ms, allowing the converter to cool down. Then, the controller
reestablishes soft start and begins to cause the output to ramp up
again (see Figure 73). While the output ramps up, CS amplifier
output is monitored to determine if the violation is still present.
If it is still present, the idle event occurs again, followed by the full
chip, power-down sequence. This cycle continues until the
violation no longer exists. If the violation disappears, the converter
is allowed to switch normally, maintaining regulation.
SYNCHRONOUS RECTIFIER
The ADP1874/ADP1875 employ internal MOSFET drivers for
the external upper side and lower side MOSFETs. The low-side
synchronous rectifier not only improves overall conduction
efficiency but it also ensures proper charging of the bootstrap
capacitor located at the upper side driver input. This is beneficial
during startup to provide sufficient drive signal to the external
upper side MOSFET and to attain fast turn-on response, which is
essential for minimizing switching losses. The integrated upper
side and lower side MOSFET drivers operate in complementary
fashion with built-in anti cross-conduction circuitry to prevent
unwanted shoot-through current that may potentially damage the
MOSFETs or reduce efficiency because of excessive power loss.
ADP1875 POWER SAVING MODE (PSM)
A power saving mode is provided in the ADP1875. The ADP1875
operates in the discontinuous conduction mode (DCM) and
pulse skips at light load to medium load currents. The controller
outputs pulses as necessary to maintain output regulation. Unlike
the continuous conduction mode (CCM), DCM operation
prevents negative current, thus allowing improved system
efficiency at light loads. Current in the reverse direction through
this pathway, however, results in power dissipation and therefore
a decrease in efficiency.
HS
HS AND LS ARE OFF
OR IN IDLE MODE
LS
0A
I
LOAD
AS THE INDUCTOR
CURRENT APPROACHES
ZERO CURRENT, THE STATE
MACHINE TURNS OFF THE
LOWER-SIDE MOSFET.
t
ON
t
OFF
09347-072
Figure 74. Discontinuous Mode of Operation (DCM)
To minimize the chance of negative inductor current buildup,
an on-board zero-cross comparator turns off all upper side and
lower side switching activities when the inductor current
approaches the zero current line, causing the system to enter
idle mode, where the upper side and lower side MOSFETs are
turned off. To e nsure idle mode entry, a 10 mV offset, connected in
series at the SW node, is implemented (see Figure 75).
10mV
ZERO-CROSS
COMPARATOR
Q2
LS
SW
I
Q2
09347-073
Figure 75. Zero-Cross Comparator with 10 mV of Offset