Datasheet

ADP1872/ADP1873 Data Sheet
Rev. B | Page 4 of 40
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT DRIVER CHARACTERISTICS
High-Side Driver
Output Source Resistance I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 2 3.5 Ω
Output Sink Resistance I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.8 2 Ω
Rise Time
2
t
r, DRVH
BST − SW = 4.4 V, C
IN
= 4.3 nF (see Figure 59)
25
ns
Fall Time
2
t
f, DRVH
BST − SW = 4.4 V, C
IN
= 4.3 nF (see Figure 60) 11 ns
Low-Side Driver
Output Source Resistance I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 1.7 3 Ω
Output Sink Resistance I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.75 2 Ω
Rise Time
2
t
r, DRVL
VDD = 5.0 V, C
IN
= 4.3 nF (see Figure 60) 18 ns
Fall Time
2
t
f, DRVL
VDD = 5.0 V, C
IN
= 4.3 nF (see Figure 59) 16 ns
Propagation Delays
DRVL Fall to DRVH Rise
2
t
tpdh, DRVH
BST − SW = 4.4 V (see Figure 59) 22 ns
DRVH Fall to DRVL Rise
2
t
tpdh, DRVL
BST − SW = 4.4 V (see Figure 60) 24 ns
SW Leakage Current I
SW, LEAK
BST = 25 V, SW = 20 V, VDD = 5.5 V 110 µA
Integrated Rectifier
Channel Impedance I
SINK
= 10 mA 22 Ω
PRECISION ENABLE THRESHOLD
Logic High Level
VIN = 2.9 V to 20 V, VDD = 2.75 V to 5.5 V
235
285
330
mV
Enable Hysteresis VIN = 2.9 V to 20 V, VDD = 2.75 V to 5.5 V 35 mV
COMP VOLTAGE
COMP Clamp Low Voltage V
COMP (LOW)
From disable state, release COMP/EN pin to enable
device (2.75 V ≤ VDD ≤ 5.5 V)
0.47 V
COMP Clamp High Voltage V
COMP (HIGH)
(2.75 V ≤ VDD ≤ 5.5 V) 2.55 V
COMP Zero Current Threshold V
COMP_ZCT
(2.75 V ≤ VDD ≤ 5.5 V) 1.15 V
THERMAL SHUTDOWN T
TMSD
Thermal Shutdown Threshold Rising temperature 155 °C
Thermal Shutdown Hysteresis 15 °C
Hiccup Current Limit Timing 6 ms
1
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure 59 and Figure 60), C
GATE
= 4.3 nF and upper- and lower-side
MOSFETs being Infineon BSC042N03MS G.
2
Not automatic test equipment (ATE) tested.