Datasheet

Data Sheet ADP1853
Rev. 0 | Page 19 of 28
MOSFET SELECTION
The choice of MOSFET directly affects the dc-to-dc converter
performance. A MOSFET with low on resistance reduces I
2
R
losses, and low gate charge reduces transition losses. The
MOSFET should have low thermal resistance to ensure that the
power dissipated in the MOSFET does not result in excessive
MOSFET die temperature.
The high-side MOSFET carries the load current during on time
and usually carries most of the transition losses of the converter.
Typically, the lower the on resistance of the MOSFET, the
higher the gate charge and vice versa. Therefore, it is important
to choose a high-side MOSFET that balances the two losses.
The conduction loss of the high-side MOSFET is determined
by the equation
DSON
RMSLOAD
C
RIP ×=
2
)(
)(
where:
R
DSON
is the MOSFET on resistance.
The gate charging loss is approximated by the equation
SWG
PV
G
fQVP ××≅
where:
V
PV
is the gate driver supply voltage.
Q
G
is the MOSFET total gate charge.
Note that the gate charging power loss is not dissipated in the
MOSFET but rather in the ADP1853 internal drivers. This
power loss should be taken into consideration when calculating
the overall power efficiency.
The high-side MOSFET transition loss is approximated by the
equation
2
)(
SW
FR
LOAD
IN
T
fttIV
P
×+××
≅
where:
P
T
is the high-side MOSFET switching loss power.
t
R
is the rise time in charging the high-side MOSFET.
t
F
is the fall time in discharging the high-side MOSFET.
t
R
and t
F
can be estimated by
RISEDRIVER
GSW
R
I
Q
t
_
≅
FALLDRIVER
GSW
F
I
Q
t
_
≅
where:
Q
GSW
is the gate charge of the MOSFET during switching and is
given in the MOSFET data sheet.
I
DRIVER_RISE
and I
DRIVER_FALL
are the driver current output from the
ADP1853 internal gate drivers.
If Q
GSW
is not given in the data sheet, it can be approximated by
2
GS
GDGSW
Q
QQ +≅
where:
Q
GD
and Q
GS
are the gate-to-drain and gate-to-source charges
given in the MOSFET data sheet.
I
DRIVER_RISE
and I
DRI VE R_FA LL
can be estimated by
GATE
SOURCEON
SP
DD
RISEDRIVER
RR
VV
I
+
−
≅
_
_
GATE
SINKON
SP
FALLDRIVER
RR
V
I
+
≅
_
_
where:
V
DD
is the input supply voltage to the driver and is between
2.75 V and 5 V, depending on the input voltage.
V
SP
is the switching point where the MOSFET fully conducts;
this voltage can be estimated by inspecting the gate charge
graph given in the MOSFET data sheet.
R
ON_SOURCE
is the on resistance of the ADP1853 internal driver,
given in Table 1, when charging the MOSFET.
R
ON_SINK
is the on resistance of the ADP1853 internal driver,
given in Table 1, when discharging the MOSFET.
R
GATE
is the on gate resistance of MOSFET given in the
MOSFET data sheet. If an external gate resistor is added, add
this external resistance to R
GATE
.
The total power dissipation of the high-side MOSFET is the
sum of conduction and transition losses:
T
CHS
PPP +≅
The synchronous rectifier, or low-side MOSFET, carries the
inductor current when the high-side MOSFET is off. The low-
side MOSFET transition loss is small and can be neglected in
the calculation. For high input voltage and low output voltage,
the low-side MOSFET carries the current most of the time.
Therefore, to achieve high efficiency, it is critical to optimize
the low-side MOSFET for low on resistance. In cases where the
power loss exceeds the MOSFET rating or lower resistance is
required than is available in a single MOSFET, connect multiple
low-side MOSFETs in parallel. The equation for low-side
MOSFET conduction power loss is
DSON
RMSLOAD
CLS
RIP ×=
2
)(
)(