Datasheet

Data Sheet ADP1853
Rev. 0 | Page 13 of 28
SYNCHRONIZATION
The switching frequency of the ADP1853 can be synchronized
to an external clock signal by connecting it to the SYNC pin.
The internal oscillator frequency, programmed by the resistor at
the FREQ pin must be set close to the external clock frequency;
therefore, the external clock frequency may vary between 0.85×
and 1.3× of the internal clock set. The resulting switching
frequency is 1× of the external SYNC frequency. When
synchronized, the ADP1853 operates in PWM.
When an external clock is detected at the first SYNC edge, the
internal oscillator is reset, and the clock control shifts to SYNC.
The SYNC edges then trigger subsequent clocking of the PWM
outputs. The DH rising edge appears approximately 100 ns after
the corresponding SYNC edge, and the frequency is locked to
the external signal. If the external SYNC signal disappears
during operation, the ADP1853 reverts to its internal oscillator.
When the SYNC function is used, it is recommended to connect a
pull-up resistor from SYNC to VCCO so that when the SYNC
signal is lost, the ADP1853 continues to operate in PWM.
PWM OR PULSE SKIP MODE OF OPERATION
The SYNC pin is a multifunctional pin. PWM mode is enabled
when SYNC is connected to VCCO or a high logic. With SYNC
connected to ground or left floating, pulse skip mode is
enabled. Switching SYNC from low to high or high to low on
the fly causes the controller to transition from forced PWM
to pulse skip mode or from pulse skip mode to forced PWM,
respectively, in two clock cycles.
Table 5. Mode of Operation
SYNC Pin Mode of Operation
Low Pulse skip mode
High Forced PWM
No Connect Pulse skip mode
Clock Signal Forced PWM
The ADP1853 has pulse skip sensing circuitry that allows the
controller to skip PWM pulses, reducing the switching
frequency at light loads and, therefore, maintaining better
efficiency during a light load operation. The resulting output
ripple is larger than that of the fixed frequency forced PWM.
Figure 18 shows the ADP1853 operating in PSM under a light
load. Pulse skip frequency under a light load is dependent on
the inductor, output capacitance, output load, and input and
output voltages.
Figure 18. Example of Pulse Skip Mode Under a Light Load
When the output load is greater than the pulse skip threshold
current, that is, when V
COMP
reaches the threshold of 0.9 V, the
ADP1853 exits the pulse skip mode of operation and enters
the fixed frequency discontinuous conduction mode (DCM),
as shown in Figure 19. When the load increases further, the
ADP1853 enters continuous conduction mode (CCM).
Figure 19. Example of Discontinuous Conduction Mode (DCM) Waveform
In forced PWM, the ADP1853 always operates in CCM at any
load; therefore, the inductor current is always continuous.
CLKOUT SIGNAL
The ADP1853 has a clock output, CLKOUT, which can be
used for synchronizing other ADP1853 controllers, thus
eliminating the need for an external clock source. The
CLKOUT frequency is 1× the internal oscillator frequency,
f
OSC
, and is 180° out of phase.
CH2 200mVCH1 10V M200µs A CH1 7.8V
1
3
4
2
CH3 20mV CH4 2A Ω
SW
COMP (CH2)
VOUT RIPPLE
INDUCTOR
CURRENT
10594-024
CH2 5VCH1 10V M1µs A CH1 13.4V
1
3
4
2
CH3 20mV CH4 2A Ω
DH
DL
OUTPUT
RIPPLE
INDUCTOR CURRENT
10594-025