Datasheet

Data Sheet ADP1851
Rev. 0 | Page 21 of 24
VOLTAGE TRACKING
The ADP1851 includes a tracking feature that tracks a master
voltage. In all tracking configurations, the output can be set as
low as 0.6 V for a given operating condition.
Two tracking configurations are possible with the ADP1851:
coincident and ratiometric tracking.
Coincident Tracking
The most common application is coincident tracking, used
in core vs. I/O voltage sequencing and similar applications. As
shown in Figure 30, coincident tracking forces the ramp rate of
the output voltage to be the same for the master and slave until
the slave output reaches its regulation voltage. Connect the slave
SS/TRK input to a resistor divider from the master voltage that
is the same as the divider used on the slave FB pin. This forces
the slave voltage to be the same as the master voltage. For
coincident tracking, use R
TRKT
= R
TOP
and R
TRKB
= R
BOT
, as shown
in Figure 31.
Figure 30. Coincident Tracking
Figure 31. Example of a Coincident Tracking Circuit
The ratio of the slave output voltage to the master voltage is a
function of the two dividers.








+








+
=
TRKB
TRKT
BOT
TOP
MASTEROUT
SLAVEOUT
R
R
R
R
V
V
1
1
_
_
As the master voltage rises, the slave voltage rises identically.
Eventually, the slave voltage reaches its regulation voltage, at
which point the internal reference takes over the regulation
while the SS/TRK input continues to increase, thus removing
itself from influencing the output voltage.
To ensure that the output voltage accuracy is not compromised
by the SS/TRK pin being too close in voltage to the reference
voltage (V
FB
, typically 0.6 V), make sure that the final value of
the SS/TRK voltage of the slave channel is at least 30 mV above V
FB
.
Ratiometric Tracking
Ratiometric tracking limits the output voltage to a fraction of
the master voltage, as illustrated in Figure 32 and Figure 33. The
final SS/TRK voltage of the slave channel should be set to at
least 30 mV above V
FB
.
Figure 32. Ratiometric Tracking
Figure 33. Example of a Ratiometric Tracking Circuit
PCB LAYOUT GUIDELINES
The recommended board layout practices for the synchronous
buck controller are described in the AN-1119 Application Note.
TIME
VOLTAGE (V)
MASTER VOLTAGE
SLAVE VOLTAGE
10595-032
SS/
TRK
FB
ADP1851
1.8V
V
OUT_SLAVE
R
TOP
20kΩ
0.6V
R
BOT
10kΩ
3.3V
V
OUT_MASTER
R
TRKT
20kΩ
1.1V
R
TRKB
10kΩ
10595-033
TIME
VOLTAGE (V)
MASTER VOLTAGE
SLAVE VOLTAGE
10595-034
SS/
TRK
FB
ADP1851
1.8V
V
OUT_SLAVE
R
TOP
20kΩ
0.6V
R
BOT
10kΩ
3.3V
V
OUT_MASTER
R
TRKT
41.2kΩ
0.65V
R
TRKB
10kΩ
10595-035