Datasheet

ADP1851 Data Sheet
Rev. 0 | Page 12 of 24
SYNCHRONIZATION
The switching frequency of the ADP1851 can be synchronized
to an external clock signal by connecting it to the SYNC pin.
The internal oscillator frequency, programmed by the resistor at
the FREQ pin, must be set close to the external clock frequency;
therefore, the external clock frequency can vary between 0.85×
and 1.3× the internal clock set. The resulting switching
frequency is 1× the external SYNC frequency. When
synchronized, the ADP1851 operates in PWM mode.
When an external clock is detected at the first SYNC edge, the
internal oscillator is reset, and the clock control shifts to SYNC.
The SYNC edges then trigger subsequent clocking of the PWM
outputs. The DH rising edge appears approximately 100 ns after
the corresponding SYNC edge, and the frequency is locked to
the external signal. If the external SYNC signal disappears
during operation, the ADP1851 reverts to its internal oscillator.
When the SYNC function is used, it is recommended that a
pull-up resistor be connected from SYNC to VCCO so that
when the SYNC signal is lost, the ADP1851 continues to operate
in PWM mode.
PWM AND PULSE SKIP MODES OF OPERATION
The SYNC pin is a multifunctional pin. PWM mode is enabled
when SYNC is connected to VCCO or a high logic. When
SYNC is connected to ground or left floating, pulse skip mode
is enabled. Switching SYNC from low to high or high to low on
the fly causes the controller to transition from forced PWM
mode to pulse skip mode or from pulse skip mode to forced
PWM mode, respectively, in two clock cycles.
Table 5. Mode of Operation
SYNC Pin Mode of Operation
Low Pulse skip mode
High Forced PWM mode
No Connect Pulse skip mode
Clock Signal Forced PWM mode
The ADP1851 has pulse skip sensing circuitry that allows the
controller to skip PWM pulses, reducing the switching
frequency at light loads and, therefore, maintaining better
efficiency during light load operation. The resulting output
ripple is larger than that of the fixed frequency forced PWM
mode. Figure 18 shows the ADP1851 operating in pulse skip
mode under a light load. Pulse skip frequency under a light load
is dependent on the inductor, output capacitance, output load,
and input and output voltages.
Figure 18. Example of Pulse Skip Mode Under a Light Load
When the output load is greater than the pulse skip threshold
current, that is, when V
COMP
reaches the threshold of 0.9 V, the
ADP1851 exits the pulse skip mode of operation and enters
the fixed frequency discontinuous conduction mode (DCM),
as shown in Figure 19. When the load increases further, the
ADP1851 enters continuous conduction mode (CCM).
Figure 19. Example of Discontinuous Conduction Mode (DCM) Waveform
In forced PWM mode, the ADP1851 always operates in CCM at
any load; therefore, the inductor current is always continuous.
M 100µs 250MS/s
4ns/pt
A CH3 8.2V
B
W
B
W
B
W
4
2
3
1
CH1 500mV CH2 100mV
CH4 10ACH3 10V
INDUCTOR
CURRENT
VOUT_AC
COMP
SW
10595-018
Ω
M 2µs 1.25GS/s
IT 40ps/pt
A CH3 8.2V
B
W
B
W
B
W
B
W
3
1
2
4
CH2 100mV
CH4 10A
CH1 5V
CH3 10V
INDUCTOR
CURRENT
VOUT_AC
DL
DH
Ω
10595-019