Datasheet

Data Sheet ADP1850
Rev. A | Page 23 of 32
VOLTAGE TRACKING
The ADP1850 includes a tracking feature that tracks a master
voltage. This feature is especially important when the ADP1850
is providing separate power supply voltages to a single integrated
circuit, such as the core and I/O voltages of a DSP, FPGA, or
microcontroller. In these cases, improper sequencing can cause
damage to the load IC.
In all tracking configurations, the output can be set as low as 0.6 V
for a given operating condition. The soft start time setting of
the master voltage should be longer than the soft start of the
slave voltage. This forces the rise time of the master voltage to
be imposed on the slave voltage. If the soft start setting of the
slave voltage is longer, the slave comes up more slowly, and the
tracking relationship is not seen at the output.
Two tracking configurations are possible with the ADP1850:
coincident and ratiometric trackings.
Coincident Tracking
The most common application is coincident tracking, used in
core vs. I/O voltage sequencing and similar applications.
Coincident tracking forces the slave output voltage’s ramp rate
to be the same as the master’s until the slave output reaches its
regulation. Connect the slave TRKx input to a resistor divider
from the master voltage that is the same as the divider used on
the slave FBx pin. This forces the slave voltage to be the same as
the master voltage. For coincident tracking, use R
TRKT
= R
TOP
and R
TRKB
= R
BOT
, as shown in Figure 37.
TIME
SLAVE VOLTAGE
MASTER VOLTAGE
VOLTAGE (V)
09440-036
Figure 36. Coincident Tracking
ADP1850
EN2EN1
EN
FB2
FB1TRK1
SS1
VCCO
TRK2
SS2
10kΩ
45.3kΩ
R
TRKB
10kΩ
R
TRKT
20kΩ
1.1V
3.3
V
V
OUT1_MASTER
C
SS2
20nF
C
SS1
100n
F
R
BOT
10kΩ
R
TOP
20kΩ
1.8V
V
OUT2_SLAVE
09440-037
Figure 37. Example of a Coincident Tracking Circuit
The ratio of the slave output voltage to the master voltage is a
function of the two dividers.
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
=
TRKB
TRKT
BOT
TOP
MASTEROUT
SLAVEOUT
R
R
R
R
V
V
1
1
_
_
As the master voltage rises, the slave voltage rises identically.
Eventually, the slave voltage reaches its regulation voltage,
where the internal reference takes over the regulation while the
TRKx input continues to increase and thus removes itself from
influencing the output voltage.
To ensure that the output voltage accuracy is not compromised
by the TRKx pin being too close in voltage to the reference voltage
(V
FB
, typically 0.6 V), make sure that the final value of the TRKx
voltage of the slave channel is at least 30 mV above V
FB
.
Ratiometric Tracking
Ratiometric tracking limits the output voltage to a fraction of
the master voltage, as illustrated in Figure 38 and Figure 39. The
final TRKx voltage of the slave channel should be set to at least
30 mV below the FB voltage of the master channel. When the
TRKx voltage of the slave channel drops to a level that’s below
the minimum on-time condition, the slave channel operates in
pulse skip mode while keeping the output regulated and tracked
to the master channel. Also, when TRKx or FBx drops below
the PGOOD undervoltage threshold, the PGOOD signal gets
tripped and becomes active low.
TIME
SLAVE VOLTAGE
MASTER VOLTAGE
VOLTAGE (V)
09440-038
Figure 38. Ratiometric Tracking
ADP1850
EN2EN1
EN
FB2
FB1TRK1
SS1
VCCO
TRK2
SS2
10kΩ
45.3kΩ
R
TRKB
10kΩ
R
TRKT
49.9kΩ
0.6V
0.55V
3.3
V
V
OUT1_MASTER
C
SS2
20nF
C
SS1
37nF
R
BOT
10kΩ
R
TOP
22.6kΩ
1.8V
V
OUT2_SLAVE
0.55V
09440-039
Figure 39. Example of a Ratiometric Tracking Circuit