Datasheet

ADP1850 Data Sheet
Rev. A | Page 12 of 32
THEORY OF OPERATION
The ADP1850 is a current mode, dual-channel, step-down
switching controller with integrated MOSFET drivers for external
N-channel synchronous power MOSFETs. The two outputs are
phase shifted 180°. This reduces the input RMS ripple current,
thus minimizing required input capacitance. In addition, the
two outputs can be combined for dual-phase PWM operation
that can deliver more than 50 A output current and the two
channels are optimized for current sharing.
The ADP1850 can be set to operate in pulse skip high efficiency
mode (power saving mode) under light load or in forced PWM.
The integrated boost diodes in the ADP1850 reduce the overall
system cost and component count. The ADP1850 includes
programmable soft start, output overvoltage protection, program-
mable current limit, power good, and tracking function. The
ADP1850 can be set to operate in any switching frequency
between 200 kHz and 1.5 MHz with one external resistor.
CONTROL ARCHITECTURE
The ADP1850 is based on a fixed frequency, current mode,
PWM control architecture. The inductor current is sensed
by the voltage drop measured across the external low-side
MOSFET, R
DSON
, during the off period of the switching cycle
(valley inductor current). The current sense signal is further
processed by the current sense amplifier. The output of the
current sense amplifier is held, and the emulated current ramp
is multiplexed and fed into the PWM comparator as shown in
Figure 22. The valley current information is captured at the end
of the off period, and the emulated current ramp is applied at
that point when the next on cycle begins. An error amplifier
integrates the error between the feedback voltage and the
generated error voltage from the COMPx pin (from error
amplifier in Figure 22).
FF
OSC Q
Q
S
R
A
CS
V
CS
V
IN
V
IN
A
R
R
RAMP
I
RAMP
C
R
FROM
ERROR AMP
TO
DRIVERS
FROM
LOW-SIDE
MOSFET
09440-023
Figure 22. Simplified Control Architecture
As shown in Figure 22, the emulated current ramp is generated
inside the IC but offers programmability through the RAMPx
pin. Selecting an appropriate value resistor from V
IN
to the
RAMPx pin programs a desired slope compensation value and,
at the same time, provides a feed forward feature. The benefits
realized by deploying this type of control scheme are that there
is no need to worry about the turn-on current spike corrupting
the current ramp. Also, the current signal is stable because the
current signal is sampled at the end of the turn-off period,
which gives time for the switch node ringing to settle. Other
benefits of using current mode control scheme still apply, such
as simplicity of loop compensation. Control logic enforces
antishoot-through operation to limit cross conduction of the
internal drivers and external MOSFETs.
OSCILLATOR FREQUENCY
The internal oscillator frequency, which ranges from 200 kHz
to 1.5 MHz, is set by an external resistor, R
FREQ
, at the FREQ
pin. Some popular f
SW
values are shown in Table 4, and a graph-
ical relationship is shown in Figure 23. For instance, a 78.7 kΩ
resistor sets the oscillator frequency to 800 kHz. Furthermore,
connecting FREQ to AGND or FREQ to VCCO sets the oscil-
lator frequency to 300 kHz or 600 kHz, respectively. For other
frequencies that are not listed in Ta ble 4, the values of R
FREQ
and f
SW
can be obtained from Figure 23, or use the following
empirical formula to calculate these values:
065.1
)kHz(96568)k(
−
×=
SWFEQ
fR
Table 4. Setting the Oscillator Frequency
R
FREQ
f
SW
(Typical)
332 kΩ 200 kHz
78.7 kΩ 800 kHz
60.4 kΩ 1000 kHz
51 kΩ 1200 kHz
40.2 kΩ 1500 kHz
FREQ to AGND 300 kHz
FREQ to VCCO 600 kHz
10
60
110
160
210
260
310
360
410
100 400 700 1000 1300 1600 1900
R
FREQ
(kΩ)
f
SW
(kHz)
R
FREQ
(kΩ) = 96,568 f
SW
(kHz)
–1.065
09440-024
Figure 23. R
FREQ
vs. f
SW