Datasheet

Data Sheet ADP1829
Rev. C | Page 5 of 28
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN, EN1, EN2 −0.3 V to +20.5 V
BST1, BST2
−0.3 V to +30 V
BST1, BST2 to SW1, SW2 −0.3 V to +6 V
CSL1, CSL2 −1 V to +30 V
SW1, SW2 −2 V to +30 V
DH1 SW1 − 0.3 V to BST1 + 0.3 V
DH2 SW2 − 0.3 V to BST2 + 0.3 V
DL1, DL2 to PGND −0.3 V to PV + 0.3 V
PGND to GND ±2 V
LDOSD, SYNC, FREQ, COMP1,
COMP2, SS1, SS2, FB1, FB2, VREG,
PV, POK1, POK2, TRK1, TRK2
−0.3 V to +6 V
θ
JA
4-Layer
(JEDEC Standard Board)
1, 2
45°C/W
Operating Ambient Temperature −40°C < T
A
< +85°C
Operating Junction Temperature
3
−40°C < T
J
< +125°C
Storage Temperature −65°C to +150°C
1
Measured with exposed pad attached to PCB.
2
Junction-to-ambient thermal resistance (θ
JA
) of the package is based on
modeling and calculation using a 4-layer board. The junction-to-ambient
thermal resistance is application and board-layout dependent. In applica-
tions where high maximum power dissipation exists, attention to thermal
dissipation issues in board design is required. For more information, refer to
Application Note AN-772, A Design and Manufacturing Guide for the Lead
Frame Chip Scale Package (LFCSP).
3
In applications where high power dissipation and poor package thermal
resistance are present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A_MAX
) is dependent on the
maximum operating junction temperature (T
J_MAX_OP
= 125
o
C), the maximum
power dissipation of the device in the application (P
D_MAX
), and the junction-
to-ambient thermal resistance of the part/package in the application (θ
JA
)
and is given by the following equation: T
A_MAX
= T
J_MAX_OP
– (θ
JA
× P
D_MAX
).
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION