Datasheet

Data Sheet ADP1829
Rev. C | Page 17 of 28
In the case of output capacitors where the impedance of the
ESR and ESL are small at the switching frequency, for instance,
where the output capacitor is a bank of parallel MLCC capacitors,
the capacitive impedance dominates and the ripple equation
reduces to
SW
OUT
L
OUT
fC
I
V
8
(7)
Make sure that the ripple current rating of the output capacitors
is greater than the maximum inductor ripple current.
During a load step transient on the output, the output capacitor
supplies the load until the control loop has a chance to ramp the
inductor current. This initial output voltage deviation due to a
change in load is dependent on the output capacitor characteristics.
Again, usually the capacitor ESR dominates this response, and
the ΔV
OUT
in Equation 6 can be used with the load step current
value for ΔI
L
.
SELECTING THE MOSFETS
The choice of MOSFET directly affects the dc-to-dc converter
performance. The MOSFET must have low on resistance
(R
DSON
) to reduce I
2
R losses and low gate-charge to reduce
switching losses. In addition, the MOSFET must have low
thermal resistance to ensure that the power dissipated in the
MOSFET does not result in overheating.
The power switch, or high-side MOSFET, carries the load
current during the PWM on-time, carries the transition loss of
the switching behavior, and requires gate charge drive to switch.
Typically, the smaller the MOSFET R
DSON
, the higher the gate
charge and vice versa. Therefore, it is important to choose a
high-side MOSFET that balances those two losses. The conduction
loss of the high-side MOSFET is determined by the equation
IN
OUT
DSON
2
L
C
V
V
RIP
(8)
where:
P
C
is the conduction power loss.
R
DSON
is the MOSFET on resistance.
The gate charge losses are dissipated by the ADP1829 regulator
and gate drivers and affect the efficiency of the system. The gate
charge loss is approximated by the equation
SWG
IN
G
fQVP
(9)
where:
P
G
is the gate charge power.
Q
G
is the MOSFET total gate charge.
f
SW
is the converter switching frequency.
Making the conduction losses balance the gate charge losses
usually yields the most efficient choice.
Furthermore, the high-side MOSFET transition loss is
approximated by the equation
( )
2
SW
FRLIN
T
fttIV
P
+
(10)
where t
R
and t
F
are the rise and fall times of the selected
MOSFET as stated in the MOSFET data sheet.
The total power dissipation of the high-side MOSFET is the
sum of the previous losses.
T
GC
D
PPPP
++=
(11)
where P
D
is the total high-side MOSFET power loss. This
dissipation heats the high-side MOSFET.
The conduction losses may need an adjustment to account for
the MOSFET R
DSON
variation with temperature. Note that
MOSFET R
DSON
increases with increasing temperature. The
MOSFET data sheet should list the thermal resistance of the
package, θ
JA
, along with a normalized curve of the temperature
coefficient of the R
DSON
. For the power dissipation estimated in
Equation 11, calculate the MOSFET junction temperature rise
over the ambient temperature of interest.
D
JAA
J
PθTT +=
(12)
Then calculate the new R
DSON
from the temperature coefficient
curve and the R
DSON
specification at 25°C. A typical value of the
temperature coefficient (TC) of the R
DSON
is 0.004/°C, so an
alternate method to calculate the MOSFET R
DSON
at a second
temperature, T
J
, is
)]C25(1[C25@@ °+°=
J
DSON
J
DSON
TTCRTR
(13)
Then the conduction losses can be recalculated and the
procedure iterated once or twice until the junction temperature
calculations are relatively consistent.
The synchronous rectifier, or low-side MOSFET, carries the
inductor current when the high-side MOSFET is off. For high
input voltage and low output voltage, the low-side MOSFET
carries the current most of the time, and therefore, to achieve
high efficiency, it is critical to optimize the low-side MOSFET
for small on resistance. In cases where the power loss exceeds
the MOSFET rating, or lower resistance is required than is
available in a single MOSFET, connect multiple low-side
MOSFETs in parallel. The equation for low-side MOSFET
power loss is
IN
OUT
DSON
2
L
LS
V
V
1RIP
(14)
where:
P
LS
is the low-side MOSFET on resistance.
R
DSON
is the parallel combination of the resistances of the low-
side MOSFETs.
Check the gate charge losses of the synchronous rectifier(s)
using the P
G
equation (Equation 9) to be sure they are
reasonable.