Datasheet
ADP1712/ADP1713/ADP1714
Rev. A | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN
G
ND
OUT
1
2
5
EN SS
3 4
ADP1712
FIXED
TOP VIEW
5
(Not to Scale)
06455-00
IN
G
ND
OUT
1
2
5
EN ADJ
3 4
ADP1712
ADJUSTABLE
TOP VIEW
(Not to Scale)
06455-006
IN
GND
OUT
1
2
5
EN BYP
3 4
ADP1713
TOP VIEW
(Not to Scale)
06455-007
IN
GND
OUT
1
2
5
EN TRK
3 4
ADP1714
TOP VIEW
(Not to Scale)
06455-008
Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix) Figure 7. 5-Lead TSOT (UJ-Suffix) Figure 8. 5-Lead TSOT (UJ-Suffix)
Table 4. Pin Function Descriptions
ADP1712
Fixed
Pin No.
ADP1712
Adjustable
Pin No.
ADP1713
Pin No.
ADP1714
Pin No. Mnemonic Description
1 1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 2.2 μF or greater capacitor.
2 2 2 2 GND Ground.
3 3 3 3 EN
Enable Input. Drive EN high to turn on the regulator; drive it low to turn
off the regulator. For automatic startup, connect EN to IN.
4 SS
Soft Start. Connect a capacitor between SS and GND to set the output
start-up time.
4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage.
4 BYP
Bypass. Connect a 1 nF or greater capacitor (10 nF recommended)
between BYP and GND to reduce the internal reference noise for low
noise applications.
4 TRK
Track. The output follows the voltage placed on the TRK pin. (See the
Theory of Operation section for a more detailed description.)
5 5 5 5 OUT
Regulated Output Voltage. Bypass OUT to GND with a 2.2 μF or greater
capacitor.