Datasheet

ADP1650
Rev. C | Page 27 of 32
The worst-case capacitance accounting for capacitor variation
over temperature, component tolerance, and voltage is calcu-
lated using the following equation:
C
EFF
= C
OUT
× (1 − TEMPCO) × (1 − TOL)
where:
C
EFF
is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the 10 F X5R capacitor has the following
characteristics:
TEMPCO from −40°C to +85°C is 15%.
TOL is 10%.
C
OUT
at VOUT (MAX) = 5 V, is 3 F, as shown in Figure 44.
08837-022
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
6.305.043.782.52
DC BIAS VOLTAGE (V)
C
A
PACITANCE CHANGE (%)
1.260
Figure 44. DC Bias Characteristic of a 3 × 6.3 V, 10 μF Ceramic Capacitor
Substituting these values in the equation yields
C
EFF
= 3 F × (1 − 0.15) × (1 − 0.1) = 2.29 F
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is 3.0 F.