Datasheet
Data Sheet ADP1649
Rev. 0 | Page 5 of 28
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITANCE AND INDUCTANCE
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
CAPACITANCE
C
MIN
Input T
A
= −40°C to +125°C 4.0 10 µF
Output T
A
= −40°C to +125°C 3.0 10 20 µF
MINIMUM AND MAXIMUM INDUCTANCE
L
T
A
= −40°C to +125°C
0.6
1.0
1.5
µH
I
2
C-COMPATIBLE INTERFACE TIMING SPECIFICATIONS
Table 3.
Parameter
1
Min Max Unit Description
f
SCL
400 kHz SCL clock frequency
t
HIGH
0.6 µs SCL high time
t
LOW
1.3 µs SCL low time
t
SU, DAT
100 ns Data setup time
t
HD, DAT
0 0.9 µs Data hold time
t
SU, STA
0.6 µs Setup time for repeated start
t
HD, STA
0.6
µs
Hold time for start/repeated start
t
BUF
1.3 µs Bus free time between a stop and a start condition
t
SU, STO
0.6 µs Setup time for a stop condition
t
R
20 + 0.1 C
B
2
300 ns Rise time of SCL and SDA
t
F
20 + 0.1 C
B
2
300 ns Fall time of SCL and SDA
t
SP
0 50 ns Pulse width of suppressed spike
C
B
2
400 pF Capacitive load for each bus line
1
Guaranteed by design.
2
C
B
is the total capacitance of one bus line in picofarads.
Timing Diagram
Figure 3. I
2
C-Compatible Interface Timing Diagram
SDA
SCL
S
S = START CONDITION
Sr = REPEATED START CONDITION
P = STOP CONDITION
Sr P S
t
LOW
t
R
t
HD, DAT
t
HIGH
t
SU, DAT
t
F
t
F
t
SU, STA
t
HD, STA
t
SP
t
SU, STO
t
BUF
t
R
10779-003