Datasheet

Data Sheet ADP1621
Rev. B | Page 3 of 32
SPECIFICATIONS
V
IN
= 5 V, R
FREQ
= 100 kΩ, f
OSC
= 200 kHz, T
J
= −40°C to 125°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
MAIN CONTROL LOOP
Internal Soft Start Time t
SS
2048 Cycles
PIN Supply Voltage
1
V
PIN
2.9 V
SHUNT
V
IN Supply Voltage
1
V
IN
2.9 V
SHUNT
V
Shunt Regulation Voltage V
SHUNT
I
IN
= 3 mA, I
PIN
= 3 mA, T
A
= 25°C 5.4 5.6 5.7 V
I
IN
= 3 mA, I
PIN
= 3 mA 5.2 5.6 6.0 V
Shunt Resistance
R
SHUNT
Current into IN = 8 mA to 12 mA
13
Ω
Current into PIN = 8 mA to 12 mA 7 Ω
IN Quiescent Current I
IN
V
IN
= 2.9 V to 5.5 V, V
FB
= 1.215 V 1.8 3 mA
IN Shutdown Current V
IN
= 2.9 V to 5.5 V, SDSN = GND 1 10 µA
PIN Supply Current I
PIN
Static Mode, No Switching V
FB
= 1.3 V, V
COMP
< V
C O M P, ZC T
, GATE = 0 V 1 10 µA
Shutdown Mode SDSN = GND 1 10 µA
Undervoltage Lockout Threshold at
IN Pin
V
UVLO
V
UVLO
rising 2.2 2.5 2.8 V
V
UVLO
hysteresis −80 mV
FB Regulation Voltage V
FB
T
A
= 25°C 1.203 1.215 1.227 V
1.197 1.215 1.233 V
FB Input Current I
FB
V
FB
= 1.215 V, T
A
= 25°C −75 +25 +75 nA
Line Regulation
2
∆V
FB
/∆V
IN
2.9 V ≤ V
IN
≤ 5 V, T
J
= −40°C to +85°C 0.02 0.06 %/V
2.9 V ≤ V
IN
≤ 5 V, T
J
= −40°C to +125°C 0.02 0.072 %/V
Load Regulation
3
∆V
FB
/∆V
COMP
V
COMP
= 1.4 V to 1.5 V −1 −0.1 %
Error Amplifier Transconductance g
m
300 µS
COMP Zero-Current Threshold V
C O M P, ZC T
0.85 1.0 1.15 V
COMP Clamp High Voltage
V
COMP,CLAMP
T
J
= −40°C to +85°C
1.9
2.0
2.1
V
T
J
= −40°C to +125°C 1.9 2.0 2.2 V
Current-Sense Amplifier Gain n 7.5 9.5 11.5 V/V
Peak Slope-Compensation Current at
CS Pin
4
I
SC,PK
V
CS
= 0 V to 100 mV maximum
across R
S
(GATE high)
55 70 85 µA
CS Pin Leakage Current I
CS,LEAK
V
CS
= 30 V (GATE low) 5 µA
Shutdown Time t
SD
SDSN pin from high to low or left floating 50 µs
Thermal Shutdown Threshold
5
T
TMSD
150 °C
Thermal Shutdown Hysteresis
5
−10 °C
OSCILLATOR
Oscillator Frequency Range
6
f
OSC
100 1500 kHz
Oscillator Frequency f
OSC
R
FREQ
= 65 kΩ, T
A
= 25°C 255 325 395 kHz
Oscillator Frequency Tempco f
OSC,TC
±0.06 %/°C
SDSN Input Level Threshold V
SDSN,THRESH
V
IN
= V
PIN
= 5 V 1.5 1.7 1.9 V
SDSN Threshold Hysteresis −0.19 V
SDSN Internal Pull-Down Resistor R
SDSN
100 kΩ
Synchronization Minimum Pulse Width t
SYNC,MIN
V
SDSN
= 0 V to V
IN
45 100 ns
Synchronization Maximum Pulse Width t
SYNC,MAX
V
SDSN
= 0 V to V
IN
0.8/f
SYNC
ns
Synchronization Frequency f
SYNC
110 1800 kHz
GATE Minimum On Time t
ON,MIN
V
FB
= 1.215 V, V
COMP
= 1.0 V 180 215 ns
GATE Minimum Off Time t
OFF,MIN
V
FB
= 1.215 V, V
COMP
= 2.0 V 190 230 ns
Maximum Duty Cycle
6, 7
D
MAX
f
SW
= 200 kHz, R
FREQ
= 100 kΩ 93 97 %
Recommended Maximum
Synchronized Frequency Ratio
6, 8
f
SYNC
/f
OSC
f
OSC
= 200 kHz, R
FREQ
= 100 kΩ, f
SYNC
= f
SW
1.1 1.2 1.4