Datasheet

Data Sheet ADP1053
Rev. A | Page 69 of 84
LIGHT LOAD PWM DISABLE REGISTERS
Table 99. Register 0xFE69—Channel A Light Load Mode PWM Output Disable
Bits Bit Name R/W Description
7 OUT8 disable R/W Setting this bit disables the OUT8 output when Channel A is in light load mode.
6 OUT7 disable R/W Setting this bit disables the OUT7 output when Channel A is in light load mode.
5 OUT6 disable R/W Setting this bit disables the OUT6 output when Channel A is in light load mode.
4 OUT5 disable R/W Setting this bit disables the OUT5 output when Channel A is in light load mode.
3 OUT4 disable R/W Setting this bit disables the OUT4 output when Channel A is in light load mode.
2 OUT3 disable R/W Setting this bit disables the OUT3 output when Channel A is in light load mode.
1 OUT2 disable R/W Setting this bit disables the OUT2 output when Channel A is in light load mode.
0 OUT1 disable R/W Setting this bit disables the OUT1 output when Channel A is in light load mode.
Table 100. Register 0xFE6A—Channel B Light Load Mode PWM Output Disable
Bits Bit Name R/W Description
7 OUT8 disable R/W Setting this bit disables the OUT8 output when Channel B is in light load mode.
6 OUT7 disable R/W Setting this bit disables the OUT7 output when Channel B is in light load mode.
5 OUT6 disable R/W Setting this bit disables the OUT6 output when Channel B is in light load mode.
4 OUT5 disable R/W Setting this bit disables the OUT5 output when Channel B is in light load mode.
3 OUT4 disable R/W Setting this bit disables the OUT4 output when Channel B is in light load mode.
2 OUT3 disable R/W Setting this bit disables the OUT3 output when Channel B is in light load mode.
1 OUT2 disable R/W Setting this bit disables the OUT2 output when Channel B is in light load mode.
0 OUT1 disable R/W Setting this bit disables the OUT1 output when Channel B is in light load mode.
FAST OCP AND CHANNEL C CURRENT SENSE SETTING REGISTERS
Table 101. Register 0xFE6B—CS1_A Blanking Reference Edge
Bits Bit Name R/W Description
[7:4] Reserved R/W Reserved.
3
OUT6 rising edge
blanking
R/W
This bit specifies whether the blanking time for the CS1_A OCP comparator is referenced to the
rising edge of OUT6.
0 = no blanking at OUT6 rising edge.
1 = blanking time referenced to OUT6 rising edge.
2
OUT5 rising edge
blanking
R/W
This bit specifies whether the blanking time for the CS1_A OCP comparator is referenced to the
rising edge of OUT5.
0 = no blanking at OUT5 rising edge.
1 = blanking time referenced to OUT5 rising edge.
1
OUT2 rising edge
blanking
R/W
This bit specifies whether the blanking time for the CS1_A OCP comparator is referenced to the
rising edge of OUT2.
0 = no blanking at OUT2 rising edge.
1 = blanking time referenced to OUT2 rising edge.
0
OUT1 rising edge
blanking
R/W
This bit specifies whether the blanking time for the CS1_A OCP comparator is referenced to the
rising edge of OUT1.
0 = no blanking at OUT1 rising edge.
1 = blanking time referenced to OUT1 rising edge.