Datasheet

ADP1053 Data Sheet
Rev. A | Page 64 of 84
PWM OUTPUT TIMING REGISTERS
Figure 43 shows the timing of the rising and falling edges of the PWM outputs. Register 0xFE40 to Register 0xFE5F describe the
implementation and programming of the eight PWM signals that are output from the ADP1053. In Figure 43, OUT
X
is an example
of PWM timing without the 180° phase shift setting, and OUT
Y
is an example of PWM timing with the 180° phase shift setting.
t
RX
t
FX
t
RY
t
FY
t
0
, START OF
SWITCHING CYCLE
t
S
, END OF
SWITCHING CYCLE
t
S
/2 3 t
S
/2
OUT
X
OUT
Y
10241-048
Figure 43. PWM Output Timing Diagram
Table 86. Register 0xFE40/0xFE44/0xFE48/0xFE4C/0xFE50/0xFE54/0xFE58/0xFE5C—OUT1 to OUT8 Rising Edge Timing (MSBs)
Bits Bit Name R/W Description
[7:0]
OUT
X
rising edge
timing (t
RX
), MSBs
R/W
This register contains the eight MSBs of the 12-bit t
RX
time. This value is always used with
Bits[7:4] of Register 0xFE42/0xFE46/0xFE4A/0xFE4E/0xFE52/0xFE56/0xFE5A/0xFE5E, which
contains the four LSBs of the t
RX
time. Each LSB corresponds to 5 ns resolution.
Table 87. Register 0xFE41/0xFE45/0xFE49/0xFE4D/0xFE51/0xFE55/0xFE59/0xFE5D—OUT1 to OUT8 Falling Edge Timing (MSBs)
Bits Bit Name R/W Description
[7:0]
OUT
X
falling edge
timing (t
FX
), MSBs
R/W
This register contains the eight MSBs of the 12-bit t
FX
time. This value is always used with
Bits[3:0] of Register 0xFE42/0xFE46/0xFE4A/0xFE4E/0xFE52/0xFE56/0xFE5A/0xFE5E, which
contains the four LSBs of the t
FX
time. Each LSB corresponds to 5 ns resolution.
Table 88. Register 0xFE42/0xFE46/0xFE4A/0xFE4E/0xFE52/0xFE56/0xFE5A/0xFE5E—OUT1 to OUT8 Rising and Falling Edge
Timing (LSBs)
Bits Bit Name R/W Description
[7:4]
OUT
X
rising edge
timing (t
RX
), LSBs
R/W
These bits contain the four LSBs of the 12-bit t
RX
time. This value is always used with the eight
bits of Register 0xFE40/0xFE44/0xFE48/0xFE4C/0xFE50/0xFE54/0xFE58/0xFE5C, which contains
the eight MSBs of the t
RX
time. Each LSB corresponds to 5 ns resolution.
[3:0]
OUT
X
falling edge
timing (t
FX
), LSBs
R/W
These bits contain the four LSBs of the 12-bit t
FX
time. This value is always used with the eight
bits of Register 0xFE41/0xFE45/0xFE49/0xFE4D/0xFE51/0xFE55/0xFE59/0xFE5D, which contains
the eight MSBs of the t
FX
time. Each LSB corresponds to 5 ns resolution.