Datasheet

Data Sheet ADP1053
Rev. A | Page 61 of 84
Table 68. Register 0xFE2E—Channel A Normal Mode Zero Setting
Bits Bit Name R/W Description
[7:0]
Channel A normal
mode zero setting
R/W
This register specifies the position of the zero in the feedback filter for Channel A in normal
mode (see Figure 41).
Table 69. Register 0xFE2F—Channel B Normal Mode Zero Setting
Bits Bit Name R/W Description
[7:0]
Channel B normal
mode zero setting
R/W
This register specifies the position of the zero in the feedback filter for Channel B in normal
mode (see Figure 41).
Table 70. Register 0xFE30—Channel A Normal Mode Pole Setting
Bits Bit Name R/W Description
[7:0]
Channel A normal
mode pole setting
R/W
This register specifies the position of the pole in the feedback filter for Channel A in normal
mode (see Figure 41).
Table 71. Register 0xFE31—Channel B Normal Mode Pole Setting
Bits Bit Name R/W Description
[7:0]
Channel B normal
mode pole setting
R/W
This register specifies the position of the pole in the feedback filter for Channel B in normal
mode (see Figure 41).
Table 72. Register 0xFE32—Channel A Normal Mode High Frequency Gain
Bits Bit Name R/W Description
[7:0]
Channel A normal
mode high
frequency gain
R/W
This register specifies the high frequency gain of the feedback filter for Channel A in normal
mode. The gain is programmable over a 20 dB range (see Figure 41). Each LSB corresponds to
a 0.3 dB increase.
Table 73. Register 0xFE33—Channel B Normal Mode High Frequency Gain
Bits Bit Name R/W Description
[7:0]
Channel B normal
mode high
frequency gain
R/W
This register specifies the high frequency gain of the feedback filter for Channel B in normal
mode. The gain is programmable over a 20 dB range (see Figure 41). Each LSB corresponds to
a 0.3 dB increase.
Table 74. Register 0xFE34—Channel A Light Load Mode Low Frequency Gain
Bits Bit Name R/W Description
[7:0]
Channel A light load
mode low frequency
gain
R/W
This register specifies the low frequency gain of the feedback filter for Channel A in light load
mode. The gain is programmable over a 20 dB range (see Figure 41). Each LSB corresponds to
a 0.3 dB increase.
Table 75. Register 0xFE35—Channel B Light Load Mode Low Frequency Gain
Bits Bit Name R/W Description
[7:0]
Channel B light load
mode low frequency
gain
R/W
This register specifies the low frequency gain of the feedback filter for Channel B in light load
mode. The gain is programmable over a 20 dB range (see Figure 41). Each LSB corresponds to
a 0.3 dB increase.
Table 76. Register 0xFE36—Channel A Light Load Mode Zero Setting
Bits Bit Name R/W Description
[7:0]
Channel A light load
mode zero setting
R/W
This register specifies the position of the zero in the feedback filter for Channel A in light load
mode (see Figure 41).