Evaluation Board User Guide UG-320 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.
UG-320 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Synchronous Rectifier Peak Inverse Voltage (PIV) ............... 21 Reference Design Contents ............................................................. 1 Output Ripple ............................................................................. 21 Caution ......................................................................................
Evaluation Board User Guide UG-320 DEMO BOARD SPECIFICATIONS Table 1. Target Specifications Parameter VIN VOUT IOUT TA Efficiency Switching frequency Output Voltage Ripple Min 350 10.8 0.0 0 Typ 385 12 25 50 91.5% 148.8 Max 400 13.2 25 50 100 Unit V V A ºC % kHz mV Rev.
UG-320 Evaluation Board User Guide TOPOLOGY AND CIRCUIT DESCRIPTION This user guide describes the ADP1046 in a typical dc-to-dc switching power supply in an interleaved two-switch forward topology with synchronous rectification. Figure 75 and Figure 76 show the schematics of the main power stage and the peripheral connections, respectively. The daughter card schematic is shown in Figure 77. The circuit is designed to provide a rated load of 12 V/ 25 A from an input voltage source of 350 V dc to 400 V dc.
Evaluation Board User Guide UG-320 ADVANTAGES OF INTERLEAVING respective primary switches are on. Interleaving technology improves circuit efficiency, reduces current ripple generated at the output, and increases its effective ripple frequency. This allows for reduction of the output filter capacitor. The interleaving approach can also significantly reduce the input filter inductor and capacitor requirement and improve dynamic response.
UG-320 Evaluation Board User Guide QA1 QB1 QR1 t SFW1 t D t VTp1 D QA2 QB2 QR2 t SFW2 t D t VTp2 D IQA1 IQB1 t ILO1 t IQA2 IQB2 t ILO2 t t t0 t1 t3 t2 10180-002 ILO1 + ILO2 Figure 3. Summary of Key Waveforms for I2SF Topology The key waveforms are illustrated in Figure 3.
Evaluation Board User Guide UG-320 CONNECTORS Table 2 lists the connectors on the board. Table 2. Board Connectors Evaluation Board Function +400 V/−400 V input +12 V/−12 V output External 12 V Fan connector I2C connector Digital share Bus Daughter card connector 10180-003 Connector J1/J2 J3/J4 J6 J19 J10 J7 J5 Figure 4. I2C Connector (Pin 1 on Left) The pinout of the USB dongle is shown in Table 3. Table 3. I2C Connector Pin Descriptions Pin No.
UG-320 Evaluation Board User Guide SETTINGS FILES AND EEPROM The ADP1046 communicates with the GUI software using the I2C bus. The register settings (having extension .46r) and the board settings (having extension .46b) are two files that are associated with the ADP1046 software (see Appendix III—Register File (ADP1046_I2SF_032011.46r) and Appendix IV—Board File (ADP1046_I2SF_032011.46b)).
Evaluation Board User Guide UG-320 EVALUATION BOARD EQUIPMENT • • • • • DC power supply (350 V to 400 V, 400 W) Electronic load (25 A/300 W) Oscilloscope with differential probes PC with ADP1046 GUI installed Precision digital voltmeters (HP34401or equivalent) for measuring dc voltage 2. 3. 4. SETUP Do not connect the USB cable to the evaluation board until the software has finished installing. Install the ADP1046 software by inserting the installation CD.
UG-320 Figure 7. ADP1046 Address of 0x50 in the GUI SCAN DASHBOARD SAVE SPY STORE NOW FOR REGISTERS WINDOW BOARD MONITOR TO EEPROM SETTINGS AND CONTROL TO EEPROM AND LOAD/SAVE FILES LOCK/ UNLOCK TRIM REGISTERS Figure 8. Scan for ADP1046 Now Icon If the software does not detect the part, it enters simulation mode. Ensure that the connecter is connected to J10 (on the main board) or J7 (on the daughter card). Click the Scan Now icon (see Figure 8). 10180-010 6.
Evaluation Board User Guide The original register configuration is stored in the ADP1046_I2SF_B_xxxx.46r register file. (Note that all register files have an extension of .46r.) The file can be loaded using the second icon from the left in Figure 10. The IC on the board is preprogrammed, and this step is optional. 9. Connect a dc power source (385 V dc nominal, current limit to ~1 A) and an electronic load set to 1 A at the output. 10. Connect a voltmeter at the TP37 and TP38 test points.
Evaluation Board User Guide 10180-009 UG-320 Figure 11. Flags and Readings Window in GUI Showing the Entire Status of the PSU at Full Load Rev.
Evaluation Board User Guide UG-320 THEORY OF OPERATION DURING STARTUP The following steps briefly describe the start-up procedure of the ADP1046 and the power supply and operation of the state machine for the preprogrammed set of registers that are included in the design kit. 1. 2. 3. 4. After VDD (3.3 V) is applied to the ADP1046, it takes approximately 20 µs for VCORE to reach 2.5 V. The digital core is now activated and the contents of the registers are downloaded in the EEPROM.
UG-320 Evaluation Board User Guide CONFIGURING FLAG SETTINGS fault flags (if any) and the readings on one page (see Figure 12). The Get First Flag button (see Figure 11), which can be accessed by clicking the Monitor tab, determines the first flag that was set in case of a fault event. 10180-011 When a flag is triggered, the ADP1046 state machine waits for a programmable length of debounce time before taking any action. The response to each flag can be programmed individually.
Evaluation Board User Guide UG-320 PWM SETTINGS Click the Monitor tab and then PWM & SR Settings to access the PWM settings The ADP1046 has a fully programmable PWM setup that controls seven PWMs. Due to this flexibility, the IC can function in several different topologies, such as any isolated buck derived topology, push-pull, and flyback. Table 5.
Evaluation Board User Guide 10180-013 UG-320 Figure 14. Fan Connection to Cool Heat Sink, Transformers, and Inductors FAN CONTROL The OUTAUX PWM is used to control an external fan connected to Connector J19. The average speed of the fan depends on the load. The PWM input to the fan is duty cycle modulated and is programmed with the main PWM output in a manner that provides the maximum speed at maximum load and vice versa. Note that the fan is not included in the kit.
Evaluation Board User Guide UG-320 BOARD EVALUATION AND TEST DATA 10180-016 10180-014 STARTUP Figure 15. Startup at 350 V DC, No Load Green Trace: Output Voltage, 2 V/div, 10 ms/div Blue Trace: Load Current, 10 A/div, 10 ms/div Figure 16. Startup at 350 V DC, 25 A Load (1 A/µs Slew Rate) Green Trace: Output Voltage, 2 V/div, 10 ms/div Blue Trace: Load Current, 10 A/div, 10 ms/div 10180-017 10180-015 Figure 17.
Evaluation Board User Guide Figure 19. Startup at 350 V DC, Load (1 A/µs Slew Rate) Yellow Trace: Phase 1 Drain Voltage on Q2, 100 V/div, 10 ms/div Red Trace: Phase 2 Drain Voltage on Q4, 100 V/div, 10 ms/div Blue Trace: Load Current, 10 A/div, 10 ms/div Cursor Showing Phase 2 Enabled at 15 A 10180-020 10180-018 UG-320 Figure 20.
Evaluation Board User Guide UG-320 10180-024 PRIMARY CURRENT 10180-022 TRANSFORMER PRIMARY WAVEFORM 10180-023 10180-024 Figure 25. Input RMS Current at 25 A Load, 350 V DC Yellow Trace: Primary Current, 1 A/div, 20 ms/div Green Trace: Output Voltage, 2 V/div, 20 ms/div Figure 23. Transformer Primary Waveform at 25 A Load, 350 V DC Red Trace: Voltage Across T1 Primary (Phase 1), 200 V/div, 2 µs/div Yellow Trace: Voltage Across T2 (Phase 2), 200 V/div, 2 µs/div Figure 26.
UG-320 Evaluation Board User Guide 10180-026 10180-028 DRAIN VOLTAGE AND CURRENT Figure 27. Drain Voltage at 25 A Load, 385 V DC Red and Green Trace: Primary MOSFET Drain Voltage Across Q2 and Q4, 100 V/div, 2 µs/div Yellow Trace: CS1 Pin Voltage, 1 V/div, 2 µs/div Figure 29. CS1 Pin Voltage at 25 A Load, 350 V DC, Current Balancing Disabled Blue Trace: Voltage at CS1, 500 mV/div, 2 µs/div 10180-029 CS1 PIN VOLTAGE AND CURRENT BALANCING OF PHASES 10180-027 Figure 30.
Evaluation Board User Guide UG-320 Figure 34. Output Voltage at C65 (AC-Coupled), 350 V DC, 25 A, 50 mV/div, 5 µs/div, High Frequency Component 10180-032 10180-034 Figure 32. Synchronous Rectifier and Freewheeling MOSFET PIV at 25 A Load, 350 V DC Blue Trace: Synchronous Rectifier, 10 V/div, 500 ns/div Red Trace: Freewheeling FET Voltage, 20 V/div, 500 ns/div 10180-033 OUTPUT RIPPLE 10180-031 SYNCHRONOUS RECTIFIER PEAK INVERSE VOLTAGE (PIV) Figure 35.
10180-039 Evaluation Board User Guide 10180-036 UG-320 Figure 40. Output Voltage Transient, 25% to 0% Load, 385 V DC, Both Phases Active Yellow Trace: Load Current, 5 A/div, 500 µs/div Green Trace: Output Voltage (AC-Coupled), 100 mV/div, 500 µs/div Figure 38. Output Voltage at 2700 µF Capacitor C10 (AC-Coupled), 385 V DC, 25 A, 100 mV/div, 5 µs/div, High Frequency Component 10180-040 10180-037 Figure 37.
Evaluation Board User Guide UG-320 10180-042 10180-044 Load Step of 25% to 50% 10180-043 10180-045 Figure 45. Output Voltage Transient, 50% to 25% Load, 385 V DC, One Phase Only Yellow Trace: Load Current, 5 A/div, 200 µs/div Green Trace: Output Voltage (AC-Coupled), 100 mV/div, 200 µs/div Figure 43. Output Voltage Transient, 25% to 50% Load, 385 V DC, One Phase Only Yellow Trace: Load Current, 5 A/div, 200 µs/div Green Trace: Output Voltage (AC-Coupled), 100 mV/div, 200 µs/div Figure 46.
UG-320 Evaluation Board User Guide 10180-047 Figure 47. Output Voltage Transient, 50% to 75% Load, 385 V DC, One Phase Only Yellow Trace: Load Current, 5 A/div, 1 ms/div Green Trace: Output Voltage (AC-Coupled), 200 mV/div, 1 ms/div Figure 48. Output Voltage Transient, 50% to 75% Load, 385 V DC, Both Phases Active Yellow Trace: Load Current, 5 A/div, 200 µs/div Green Trace: Output Voltage (AC-Coupled), 100 mV/div, 200 µs/div Rev. A | Page 24 of 48 10180-048 Figure 49.
Evaluation Board User Guide UG-320 Load Step of 75% to 100% Figure 51. Output Voltage Transient, 75% to 100% Load, 385 V DC, Both Phases Active Yellow Trace: Load Current, 10 A/div, 1 ms/div Green Trace: Output Voltage (AC-Coupled), 100 mV/div, 1 ms/div 10180-052 10180-050 PHASE SHEDDING TURN-ON/OFF TIME Figure 52.
UG-320 Evaluation Board User Guide 20 A to 10 A Load Step PRIMARY CURRENT DURING LOAD TRANSIENT 10180-055 Figure 55. Input Current During Load Step of 10 A to 20 A Yellow Trace: Load Current, 5 A/div, 10 ms/div Red Trace: Voltage at CS1 Pin, 500 mV/div (20 µs/div Zoomed In) 10180-056 Figure 56. Input Current During Load Step of 10 A to 20 A Showing Steady Balancing of Both Phases; Yellow Trace: Load Current, 5 A/div, 10 ms/div Red Trace: Voltage at CS1 Pin, 500 mV/div (20 µs/div Zoomed In) Figure 57.
Evaluation Board User Guide UG-320 10180-061 DIGITAL CURRENT SHARING 10180-059 OUTPUT OVERCURRENT PROTECTION Figure 62. OrFET Turn-On Green Trace: Output Voltage, 2 V/div, 20 ms/div Red Trace: GATE Signal Voltage, 2 V/div, 20 ms/div 10180-060 10180-062 Figure 60. Output Short-Circuit Protection, 130 ms Debounce on CS2, Response Set to Disable PSU and Reenable After 1 sec, Yellow Trace: Load Current, 20 A/div, 500 ms/div Green Trace: Output Voltage, 5 V/div, 500 ms/div Figure 63.
UG-320 Evaluation Board User Guide CLOSED-LOOP FREQUENCY RESPONSE 100 90 A network analyzer (AP200) was used to test the bode plots of the system. Jumper J18 was replaced by a 20 Ω resistor, and a continuous noise signal of 400 mV was injected into the VS3+ pin before the voltage divider (R10 and R11 on daughter card). The operating condition was 385 V dc input and a load condition of 25 A.
Evaluation Board User Guide UG-320 NO LOAD POWER 14 400 12 390 10 STANDBY POWER (W) 410 380 370 0A LOAD 1A LOAD 5A LOAD 10A LOAD 15A LOAD 20A LOAD 25A LOAD 350 340 350 355 360 365 370 375 380 385 MEASURED INPUT VOLTAGE 390 395 400 8 NO LOAD POWER (LIGHT LOAD MODE DISABLED) NO LOAD POWER (LIGHT LOAD MODE ENABLED) 6 4 2 0 340 350 360 370 380 390 INPUT VOLTAGE (V DC) 400 410 10180-071 360 10180-069 GUI REPORTED VOLTAGE ACSNS LINEARITY Figure 72. No Load Power Figure 70.
UG-320 Evaluation Board User Guide 10180-174 THERMAL PERFORMANCE Figure 74. Thermal Performance at 385 V DC Input, 12 V, 25 A Output Load, No Airflow, Soaking Time of 60 Minutes Rev.
G A T E D R IV E R S Phase2_FRwheel_DR Phase2_SR_DR Phase1_SR_DR Phase1_FRwheel_DR Phase1_switch_DR Phase2_switch_DR 1 6 1 T5 DA2320 4 3 5 2 400V rtn VSS VSS VSS 4 3 2 1 4 3 2 1 4 3 2 1 OUTB VDD OUTA NC2 NC2 OUTB VDD OUTA NC2 OUTB VDD OUTA VSS 25V C40 4.7uF C39 4.7uF C36 4.
AGND VCC+12V VS3+ VS3+5V +3.3V VS1 VS2 PGOOD2 PGOOD1 GATE SR1 SR2 OUTX OUTD OUTC OUTB OUTA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 ADP1043_DC SHAREO SHAREI SDA SCL RTD FLAGIN PGOOD2 PGOOD1 PSON OUTAUX OUTD OUTC OUTB OUTA CS1 ACSNS SR1 SR2 CS2CS2+ PGND VS1 VS2 GATE VS3+ VS35V 3.
17 Synchronous Rectifier Output 1 Share Bus Output NOTES: 2 Analog Share Bus Feedback Pin C 18 DNI R2 1k R1 27K AC S NS VCOR E C 13 DNI DNI C 10 L ow S ide 4. 99k 4. 99k D N I H igh S ide 110k 110k D N I DNI C 17 33pF 33pF DNI C 16 P G O O D 1/2 R4 R 14, R 15 = 2. 2k 1% C 26 = 330pF 50V X 7R S H A R E O /I R3 R 19 = 10k 1% R 33, R 32 = 2.
UG-320 Evaluation Board User Guide 10180-076 MAIN BOARD LAYOUT 10180-077 Figure 78. Layout, Top Silkscreen, 6.5 in × 5 in Figure 79. Layout, First Layer, 6.5 in × 5 in Rev.
UG-320 10180-078 Evaluation Board User Guide 10180-079 Figure 80. Layout, Second Layer, 6.5 in × 5 in Figure 81. Layout, Third Layer, 6.5 in × 5 in Rev.
Evaluation Board User Guide 10180-080 UG-320 10180-081 Figure 82. Layout, Bottom Layer, 6.5 in × 5 in Figure 83. Layout, Bottom Layer Silkscreen, 6.5 in × 5 in Rev.
Evaluation Board User Guide UG-320 10180-082 DAUGHTER CARD LAYOUT 10180-083 Figure 84. Top Layer, 1.5 in × 1.08 in Figure 85. Ground Layer, 1.5 in × 1.08 in Rev.
Evaluation Board User Guide 10180-084 UG-320 10180-085 Figure 86. Power Layer, 1.5 in × 1.08 in Figure 87. Bottom Layer, 1.5 in × 1.08 in Rev.
Evaluation Board User Guide UG-320 BILL OF MATERIALS Table 6.
UG-320 Evaluation Board User Guide Qty 4 Reference Designator Q5 to Q7, Q9 Description MOSFET N-channel 100 V, 120 A 3 1 1 1 1 2 Q8, Q10 Q11 Q13 Q14 RTD1 R1, R5 SMD MOSFET N-channel 20 V, 60 A DNI MOSFET N-channel 50 V, 220 mA SMD MOSFET N-channel 100 V, 170 mA Thermistor NTC 100 kΩ, 5%, RAD SMD resistor 0.003 Ω, 2 W, 1% 3 R2, R3, R4 SMD resistor 10.0 Ω, ¾ W, 5% 1 R5 SMD resistor 0.
Evaluation Board User Guide UG-320 Table 7. Daughter Card Qty 1 1 3 2 1 1 2 Reference C5 C6 C8, C11, C14 C10, C13 C12 C15 D1, D2 Part Description Capacitor ceramic 1.0 µF, 50 V, 10%, X7R Capacitor ceramic 330 pF, 10%, 100 V, X7R Capacitor ceramic 0.1 µF, 10%, 50 V, X7R Capacitor ceramic 100 pF, 10%, 100 V, X7R Capacitor ceramic 4.
UG-320 Evaluation Board User Guide APPENDIX I—TRANSFORMER SPECIFICATIONS Table 8. Transformer Specifications Min Typ Max Unit 4.25 7 Notes ETD 29 horizontal, 3F3 or equivalent Pin 1 and Pin 3 Pin 1 and Pin 3 with all other windings shorted Pin 1 and Pin 3 with all other windings open mH µH kHz 850 12, 13, 14 1 44T SPLIT PRIMARY 2 × 28AWG 4T, COPPER FOIL, 10mil 3 10180-086 Parameter Core and Bobbin Primary Inductance Leakage Inductance Resonant Frequency 8, 9, 10 Figure 88.
Evaluation Board User Guide UG-320 APPENDIX II—OUTPUT INDUCTOR SPECIFICATIONS 4, 2 3, 1 10180-089 18T, 16AWG EQUIVALENT LITZ WIRE Figure 91. Output Inductor Electrical Diagram Table 9. Output Inductor Specifications Parameter Core Permeability (µo) Inductance DC Resistance Min 60 6.5 Typ Max Unit Notes 77351A7, KoolMu, Magnetics, Inc. 10 10 16 µH mΩ Maximum at no load, typical at full load Rev.
UG-320 Evaluation Board User Guide APPENDIX III—REGISTER FILE (ADP1046_I2SF_032011.46R) Table 10.
Evaluation Board User Guide Register Address 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 Programmed Setting 0x5A 0x0B 0x28 0xFF 0x07 0xDD 0x00 0x00 0x00 0x45 0x00 0x00 0x00 0x9B 0x1B 0x00 0x01 0x00 0x18 0x00 0x00 0x00 0x18 0x02 0x88 0x51 0xC0 0x2A 0x10 0x2A 0x18 0x2A 0x00 0x2A 0x18 0x2C 0x
UG-320 Register Address 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F Evaluation Board User Guide Programmed Setting 0x3D 0x07 0x88 0x88 0x88 0x88 0x88 0x88 0x88 0x00 0x22 0xF2 0xCA 0x3D 0x04 0x30 0x02 0x00 0x00 0x0F 0x1F 0x60 0x34 0x00 0x00 Name Light load digital filter HF gain setting Adaptive dead time threshold Dead Time 1 Dead Time 2 Dead Time 3 Dead Time 4 Dead Time 5 Dead Time 6 Dead Time 7 Dead time configuration Soft
Evaluation Board User Guide UG-320 APPENDIX IV—BOARD FILE (ADP1046_I2SF_032011.46B) Input Voltage = 385 V N1 = 44 N2 = 4 R (CS2) = 1.75 mOhm /* use 0.85mOhm for high side sensing with OrFET RDS_ON I (load) = 25 A R1 = 11 KOhm R2 = 1 KOhm C3 = 1 uF C4 = 1 uF N1 (CS1) = 1 N2 (CS1) = 50 R (CS1) = 20 Ohm ESR (L1) = 8 mOhm L1 = 10 uH C1 = 2700 uF ESR (C1) = 16 mOhm ESR (L2) = 10 mOhm L2 = 0 uH C2 = 1000 uF ESR (C2) = 23 mOhm R (Normal-Mode) (Load) = 0.
UG-320 Evaluation Board User Guide RELATED LINKS Resource ADP3654 ADP1111 ADP1046 ADP3303 Description Product Page, High Speed, Dual, 4 A MOSFET Driver Product Page, Micropower, Step-Up/Step-Down SW Regulator; Adjustable and Fixed 3.