Datasheet
ADP1046A Data Sheet
Rev. 0 | Page 72 of 88
Table 90. Register 0x5A—OUTAUX Rising Edge Setting (OUTAUX Pin)
Bits Bit Name R/W Description
[7:4] t
13
R/W These bits contain the four LSBs of the 12-bit t
13
time. This value is always used with the eight
bits of Register 0x59, which contains the eight MSBs of the t
13
time. Each LSB corresponds to 5 ns
resolution. The entire switching period is divided into 40 ns time steps. If the t
Rx
and t
Fx
of a PWM
edge occur within the same 40 ns time step, the PWM output is 0 V. If the t
Rx
and t
Fx
occur in
different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
PERIOD
− 5 ns. Depending on the switching frequency and the OUTAUX
frequency, there is a constant lag/lead time between this edge and the other edges (t
1
to t
12
);
therefore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous
by adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or
the PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchroniza-
tion between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
3
Modulate enable
R/W
1 = PWM modulation acts on the t
13
edge.
0 = no PWM modulation of the t
13
edge.
2 t
13
sign R/W 1 = negative sign. Increase of PWM modulation moves t
13
right.
0 = positive sign. Increase of PWM modulation moves t
13
left.
[1:0] Reserved R/W Reserved.
Table 91. Register 0x5B—OUTAUX Falling Edge Timing (OUTAUX Pin)
Bits Bit Name R/W Description
[7:0] t
14
R/W This register contains the eight MSBs of the 12-bit t
14
time. This value is always used with the top
four bits of Register 0x5C, which contains the four LSBs of the t
14
time. Each LSB corresponds to
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t
Rx
and t
Fx
of a
PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t
Rx
and t
Fx
occur
in different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
PERIOD
− 5 ns. Depending on the switching frequency and the OUTAUX
frequency, there is a constant lag/lead time between this edge and the other edges (t
1
to t
12
);
therefore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous
by adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or
the PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchroniza-
tion between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
Table 92. Register 0x5C—OUTAUX Falling Edge Setting (OUTAUX Pin)
Bits Bit Name R/W Description
[7:4] t
14
R/W These bits contain the four LSBs of the 12-bit t
14
time. This value is always used with the eight
bits of Register 0x5B, which contains the eight MSBs of the t
14
time. Each LSB corresponds to 5 ns
resolution. The entire switching period is divided into 40 ns time steps. If the t
Rx
and t
Fx
of a PWM
edge occur within the same 40 ns time step, the PWM output is 0 V. If the t
Rx
and t
Fx
occur in
different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
PERIOD
− 5 ns. Depending on the switching frequency and the OUTAUX
frequency, there is a constant lag/lead time between this edge and the other edges (t
1
to t
12
);
therefore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous
by adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or
the PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchroniza-
tion between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
3 Modulate enable R/W 1 = PWM modulation acts on the t
14
edge.
0 = no PWM modulation of the t
14
edge.
2
t
14
sign
R/W
1 = negative sign. Increase of PWM modulation moves t
14
right.
0 = positive sign. Increase of PWM modulation moves t
14
left.
1 Regulate with
OUTAUX
R/W 1 =
control loop PWM modulation is regulated by OUTAUX. When this bit is set, the CS1 blanking
signal is synchronized with OUTAUX.
0 = control loop PWM modulation is regulated by OUTA, OUTB, OUTC, OUTD, SR1, and SR2
(normal mode).
Note that a write to this bit immediately switches the regulation point and frequency settings;
however, the correct modulation limit and filter settings do not take effect until a subsequent
frequency GO is executed using Register 0x7F[2]. For this reason, it is not recommended that the
regulation point be changed on the fly using Register 0x5C[1].
0 Reserved R/W Reserved. Set this bit to 0 for normal operation.